- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10737 > AD8465WBCPZ-WP (Analog Devices Inc)IC COMPARATOR 1CH LVDS 12LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD8465WBCPZ-WP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMPARATOR 1CH LVDS 12LFCSP |
| 標準包裝： | 50 |
| 類型： | 帶鎖銷 |
| 元件數(shù)： | 1 |
| 輸出類型： | 補充型，LVDS，滿擺幅 |
| 電壓 - 電源，單路/雙路(±)： | 2.5 V ~ 5.5 V |
| 電壓 - 輸入偏移（最小值）： | 2mV @ 2.5V |
| 電流 - 輸入偏壓（最小值）： | 5µA @ 2.5V |
| 電流 - 輸出（標準）： | 50mA |
| 電流 - 靜態(tài)（最大值）： | 3mA |
| CMRR, PSRR（標準）： | 50dB CMRR，60dB PSRR |
| 傳輸延遲（最大）： | 3ns |
| 磁滯： | 100µV |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 12-VFQFN 裸露焊盤，CSP |
| 安裝類型： | 表面貼裝 |
| 包裝： | 托盤 - 晶粒 |
| 產(chǎn)品目錄頁面： | 764 (CN2011-ZH PDF) |
Data Sheet
AD8465
Rev. A | Page 5 of 16
TIMING INFORMATION
Figure 2 illustrates the AD8465 latch timing relationships. Table 2 provides definitions of the terms shown in Figure 2.
1.1V
50%
VN ± VOS
DIFFERENTIAL
INPUT VOLTAGE
LATCH ENABLE
Q OUTPUT
tH
tPDL
tPLOH
tF
VIN
VOD
tS
tPL
50%
Q OUTPUT
tPDH
tPLOL
tR
0
79
58
-00
2
Figure 2. System Timing Diagram
Table 2. Timing Descriptions
Symbol
Timing
Description
tPDH
Input-to-Output High Delay
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output low-to-high transition.
tPDL
Input-to-Output Low Delay
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output high-to-low transition.
tPLOH
Latch Enable-to-Output High Delay
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
tPLOL
Latch Enable-to-Output Low Delay
Propagation delay measured from the 50% point of the latch enable signal high-to-low
transition to the 50% point of an output high-to-low transition.
tH
Minimum Hold Time
Minimum time after the negative transition of the latch enable signal that the input
signal must remain unchanged to be acquired and held at the outputs.
tPL
Minimum Latch Enable Pulse Width
Minimum time that the latch enable signal must be high to acquire an input signal change.
tS
Minimum Setup Time
Minimum time before the negative transition of the latch enable signal occurs that an
input signal change must be present to be acquired and held at the outputs.
tR
Output Rise Time
Amount of time required to transition from a low-to-high output as measured at the
20% and 80% points.
tF
Output Fall Time
Amount of time required to transition from a high-to-low output as measured at the
20% and 80% points.
VOD
Voltage Overdrive
Difference between the input voltages, VP and VN.
相關PDF資料 |
PDF描述 |
|---|---|
| VI-JNT-MY-F1 | CONVERTER MOD DC/DC 6.5V 50W |
| ADCMP607BCPZ-WP | IC COMP TTL/CMOS 1CHAN 12-LFCSP |
| VI-JNR-MY-F4 | CONVERTER MOD DC/DC 7.5V 50W |
| VI-BWY-MW-B1 | CONVERTER MOD DC/DC 3.3V 66W |
| VI-JNR-MY-F2 | CONVERTER MOD DC/DC 7.5V 50W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD8468 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| AD8468WBKSZ | 制造商:Analog Devices 功能描述:IC COMPARATOR TTL/CMOS SC70-6 制造商:Analog Devices 功能描述:IC, COMPARATOR, TTL/CMOS, SC70-6 制造商:Analog Devices 功能描述:IC, COMPARATOR, TTL/CMOS, SC70-6; Comparator Type:Low Power; No. of Comparators:1; Response Time:60ns; Supply Voltage Range:2.5V to 5.5V; Amplifier Case Style:SC-70; No. of Pins:6; IC Output Type:Voltage; Output Compatibility:CMOS, ;RoHS Compliant: Yes |
| AD8468WBKSZ-R7 | 功能描述:IC COMPARATOR TTL/CMOS SC70-6 RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 標準包裝:1 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，開路集電極，TTL 電壓 - 電源，單路/雙路(±):2.7 V ~ 5.5 V 電壓 - 輸入偏移（最小值）:7mV @ 5V 電流 - 輸入偏壓（最小值）:0.25µA @ 5V 電流 - 輸出（標準）:84mA @ 5V 電流 - 靜態(tài)（最大值）:120µA CMRR, PSRR（標準）:- 傳輸延遲（最大）:600ns 磁滯:- 工作溫度:-40°C ~ 85°C 封裝/外殼:SC-74A，SOT-753 安裝類型:表面貼裝 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1268 (CN2011-ZH PDF) 其它名稱:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| AD8468WBKSZ-RL | 功能描述:校驗器 IC R-R InputTTL/CMOSOut Comparitor RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應時間: 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel |
| AD8469 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Fast, Rail-to-Rail, Low Power, 2.5 V to 5.5 V |
發(fā)布緊急采購，3分鐘左右您將得到回復。