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參數(shù)資料
| 型號： | AD8375ACPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VGA DIFF ULDIST 24LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Differential Circuit Design Techniques for Communication Applications |
| 標準包裝： | 1 |
| 放大器類型： | 可變增益 |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 5000 V/µs |
| -3db帶寬： | 630MHz |
| 電流 - 輸入偏壓： | 900nA |
| 電流 - 電源： | 125mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 標準包裝 |
| 產(chǎn)品目錄頁面： | 775 (CN2011-ZH PDF) |
| 其它名稱： | AD8375ACPZ-R7DKR |
Data Sheet
AD8375
Rev. A | Page 17 of 24
LAYOUT CONSIDERATIONS
There are two output pins for each polarity, and they are
oriented in an alternating fashion. When designing the board,
care should be taken to minimize the parasitic capacitance due
to the routing that connects the corresponding outputs together.
A good practice is to avoid any ground or power plane under
this routing region and under the chokes to minimize the
parasitic capacitance.
CHARACTERIZATION TEST CIRCUITS
Differential-to-Differential Characterization
The S-parameter characterization for the AD8375 was
performed using a dedicated differential input to differential
output characterization board. Figure 44 shows the layout of
characterization board. The board was designed for optimum
impedance matching into a 75 Ω system. Because both the
input and output impedances of the AD8375 are 150 Ω
differentially, 75 Ω impedance runs were used to match 75 Ω
network analyzer port impedances. On-board 1 μH inductors
were used for output biasing, and the output board traces were
designed for minimum capacitance.
0.1F
06724-
046
L1
1H
L2
1H
0.1F
+5V
5
A0 TO A4
AC
75 TRACES
75
AC
AD8375
Figure 42. Test Circuit for S-Parameters on Dedicated 75 Ω
Differential-to-Differential Board
0.1F
TC3-1T
06724-
047
T1
0.1F
330
25
50
+9V
5
A0 TO A4
50
96
AC
AD8375
Figure 43. Test Circuit for Time Domain Measurements
06724-
044
Figure 44. Differential-to-Differential Characterization Board
Circuit Side Layout
C1
0.1F
C2
0.1F
TC3-1T
AD8375
06724-
043
T1
L1
1H
L2
1H
C3
0.1F
C4
0.1F
R1
62
R2
62
R4
25
R3
25
ETC1-1-13
T2
50
PAD LOSS = 11dB
+5V
5
A0 TO A4
50
AC
Figure 45. Test Circuit for Distortion, Gain, and Noise
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD8375ACPZ-REEL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:24dB Range, 1dB Step Size Programmable VGA |
| AD8375ACPZ-WP | 制造商:Analog Devices 功能描述:SP Amp Variable Gain Amp Single 5.5V 24-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:ULTRALOW DISTORTION IF VGA - Bulk 制造商:Analog Devices 功能描述:IF CELLULAR SINGLE DGA |
| AD8375-EVALZ | 制造商:Analog Devices 功能描述:EVAL BOARD FOR AD8375 制造商:Analog Devices 功能描述:EVALUATION BOARDS - Bulk |
| AD8376 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultra Low Distortion IF Dual VGA |
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