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參數(shù)資料
| 型號： | AD8343ARUZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 混頻器 |
| 英文描述： | 0 MHz - 2500 MHz RF/MICROWAVE DOUBLE BALANCED MIXER |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-14 |
| 文件頁數(shù)： | 8/32頁 |
| 文件大?。?/td> | 2171K |
| 代理商： | AD8343ARUZ-REEL |
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AD8343
Rev. B | Page 16 of 32
DC INTERFACES
BIASING AND DECOUPLING (VPOS, DCPL)
VPOS is the power supply connection for the internal bias circuit
and the LO driver. Bypass this pin closely to GND with a
capacitor in the range of 0.01 μF to 0.1 μF. The DCPL pin
provides access to an internal bias node for noise bypassing
purposes. Bypass this node to COMM with 0.1 μF.
POWER-DOWN INTERFACE (PWDN)
The AD8343 is active when the PWDN pin is held low; other-
wise the device enters a low-power state as shown in Figure 51.
01
03
4-
05
1
0
5
10
15
20
25
30
35
40
45
POWER-DOWN
SWEPT FROM
BOTH 3V TO 5V
AND 5V TO 3V
4.5
4.0
3.5
3.0
5.0
DE
V
ICE
CUR
RE
NT
(
m
A)
POWER-DOWN VOLTAGE (V)
Figure 51. Device Current vs. PWDN Voltage
To assure full power-down, the PWDN voltage must be within
0.5 V of the supply voltage at VPOS. Normal operation requires
that the PWDN pin be taken at least 1.5 V below the supply
voltage. The PWDN pin sources about 160 μA when pulled to
GND (see the Pin Configuration and Function Descriptions
section). It is not advised to leave the pin floating when the
device is disabled; a resistive pull-up to VPOS is the minimum
suggestion.
The AD8343 requires about 2.2 μs to turn off when PWDN is
show typical characteristics (they vary with bypass component
values). Figure 54 shows the test configuration used to acquire
these waveforms.
01
03
4-
0
52
CH1 200nV CH2 1.00V
M500ns
CH2
4.48V
1
2
Figure 52. PWDN Response Time Device On to Off
01
03
4-
05
3
CH1 200nV CH2 1.00V
M100ns
CH2
4.48V
1
2
Figure 53. PWDN Response Time Device Off to On
1nH
VPOS
0.1F
14
13
12
11
10
9
8
1
2
3
4
5
6
7
COMM
AD8343
INPP
INPM
DCPL
VPOS
PWDN
COMM
OUTP
OUTM
COMM
LOIP
LOIM
COMM
TRANSFORMER
RF INPUT
1740MHz
IF OUTPUT
170MHz
LO INPUT
1570MHz
TRIGGER
TEKTRONIX
TDS694C
OSCILLOSCOPE
HP8648C
SIGNAL
GENERATOR
HP8130
PULSE
GENERATOR
HP8648C
SIGNAL
GENERATOR
MATCHING
NETWORK AND
TRANSFORMER
MATCHING
NETWORK AND
TRANSFORMER
01
03
4-
0
54
Figure 54. PWDN Response Time Test Schematic
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