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參數(shù)資料
| 型號： | AD8191ASTZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE HDMI/DVI 100-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 開關(guān)，DVI/HDMI |
| 電路： | 1 x 16:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 帶卷 (TR) |
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AD8191
Rev. 0 | Page 25 of 32
APPLICATION INFORMATION
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31
Figure 31. Layout of the TMDS Traces on the AD8191 Evaluation Board (Only Top Signal Routing Layer is Shown)
The AD8191 is an HDMI/DVI switch featuring equalized
TMDS inputs and pre-emphasized TMDS outputs. It is in-
tended for use as a 4:1 switch in systems with long cable runs
on both the input and/or the output, and is fully HDMI 1.2a
receive-compliant.
PINOUT
The AD8191 is designed for an HDMI/DVI receiver pinout
at its input and a transmitter pinout at its output. This makes
the AD8191 ideal for use in AVR-type applications where the
designer routes both the inputs and the outputs directly to
HDMI/DVI connectors. This type of layout is used on the
AD8191 evaluation board, as shown in Figure 31. When the
AD8191 is used in receiver type applications, it is necessary to
change the ordering of the output pins on the PCB to match up
with the on-board receiver.
One advantage of the AD8191 in an AVR-type application is
that all of the high speed signals can be routed on one side (the
topside) of the board, as shown in Figure 31. In addition to
12 dB of input equalization, the AD8191 provides up to 6 dB of
output pre-emphasis that boosts the output TMDS signals and
allows the AD8191 to precompensate when driving long PCB
traces or output cables. The net effect of the input equalization
and output pre-emphasis of the AD8191 is that the AD8191 can
compensate for the signal degradation of both input and output
cables; it acts to reopen a closed input data eye and transmit a
full-swing HDMI signal to an end receiver.
The AD8191 also provides a distinct advantage in receive-type
applications because it is a fully buffered HDMI/DVI switch.
Although inverting the output pin order of the AD8191 on the
PCB requires a designer to place vias in the high speed signal
path, the AD8191 fully buffers and electrically decouples the
outputs from the inputs. Consequently, the effects of the vias
placed on the output signal lines are not seen at the input of the
AD8191. The programmable output terminations also improve
signal quality at the output of the AD8191. Therefore, the PCB
designer has significantly improved flexibility in the placement
and routing of the output signal path with the AD8191 over
other solutions.
CABLE LENGTHS AND EQUALIZATION
The AD8191 offers two levels of programmable equalization
for the high speed inputs: 6 dB and 12 dB. The equalizer of
the AD8191 is optimized for video data rates of 1.65 Gbps. It
can equalize up to 20 meters of 24 AWG HDMI cable at data rates
corresponding to the video format, 1080p.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8191-EVAL | 制造商:Analog Devices 功能描述:EVAL KIT FOR 4:1 HDMI/DVI SWIT W/ EQUALIZATION - Bulk |
| AD8192 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2:1 HDMI/DVI Switch with Equalization and DDC/CEC Buffers |
| AD8192ACPZ | 功能描述:IC SW MUX HDMI/DVI 2:1 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 特色產(chǎn)品:MicroPak? 標(biāo)準(zhǔn)包裝:1 系列:- 功能:開關(guān) 電路:2 x SPST - NC 導(dǎo)通狀態(tài)電阻:500 毫歐 電壓電源:單電源 電壓 - 電源，單路/雙路(±):1.4 V ~ 4.3 V 電流 - 電源:150nA 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-XFDFN 供應(yīng)商設(shè)備封裝:8-XSON，SOT833-1 （1.95x1） 包裝:Digi-Reel® 其它名稱:568-5557-6 |
| AD8192ACPZ-RL7 | 功能描述:IC SW MUX HDMI/DVI 2:1 56LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8192-EVALZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:2:1 HDMI/DVI Switch with Equalization and DDC/CEC Buffers |
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