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參數(shù)資料
| 型號： | AD8191AASTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC HDMI/DVI SWITCH 4:1 100LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 開關(guān)，DVI/HDMI |
| 電路： | 1 x 16:1 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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AD8191A
Rev. 0 | Page 16 of 28
end a st
).
13b.
ated start condition (while holding the
13c.
13d.
on (while holding the
SWITCH
writes to the configura-
s
tion
e
ally
w;
READ PROCEDURE
To read data from the AD8191A register set, an I2C master
(such as a microcontroller) needs to send the appropriate
control signals to the AD8191A slave device. The signals are
controlled by the I2C master, unless otherwise specified. For a
diagram of the procedure, see Figure 30. The steps for a read
procedure are as follows:
1.
Send a start condition (while holding the I2C_SCL line
high, pull the I2C_SDA line low).
2.
Send the AD8191A part address (seven bits). The upper
four bits of the AD8191A part address are the static value
[1001] and the three LSBs are set by Input Pin I2C_ADDR2,
Input Pin I2C_ADDR1, and Input Pin I2C_ADDR0 (LSB).
This transfer should be MSB first.
3.
Send the write indicator bit (0).
4.
Wait for the AD8191A to acknowledge the request.
5.
Send the register address (eight bits) from which data is to
be read. This transfer should be MSB first.
6.
Wait for the AD8191A to acknowledge the request.
7.
Send a repeated start condition (Sr) by holding the
I2C_SCL line high and pulling the I2C_SDA line low.
8.
Resend the AD8191A part address (seven bits) from
Step 2. The upper four bits of the AD8191A part address
are the static value [1001] and the three LSBs are set by the
Input Pin I2C_ADDR2, I2C_ADDR1 and Input
Pin I2C_ADDR0 (LSB). This transfer should be MSB first.
9.
Send the read indicator bit (1).
10. Wait for the AD8191A to acknowledge the request.
11. The AD8191A serially transfers the data (eight bits) held in
the register indicated by the address set in Step 5. This data
is sent MSB first.
12. Acknowledge the data from the AD8191A.
13. Perform one of the following:
13a. S
op condition (while holding the I2C_SCL
line high, pull the SDA line high) and release control
of the bus to end the transaction (shown in Figure 30
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of the write procedure (previous
Write Procedure section) to perform a write.
Send a repeated start condition (while holding the
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of this procedure to perform a
read from another address.
Send a repeated start conditi
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 8 of this procedure to perform a
read from the same address.
ING/UPDATE DELAY
There is a delay between when a user
tion registers of the AD8191A and when that state change take
physical effect. This update delay occurs regardless of whether
the user programs the AD8191A via the serial or the parallel
control interface. When using the serial control interface, the
update delay begins at the falling edge of I2C_SCL for the last
data bit transferred, as shown in Figure 29. When using the
parallel control interface, the update delay begins at the transi
edge of the relevant parallel interface pin. This update delay is
register specific and the times are specified in Table 1.
During a delay window, new values can be written to th
configuration registers, but the AD8191A does not physic
update until the end of that register’s delay window. Writing
new values during the delay window does not reset the windo
new values supersede the previously written values. At the end
of the delay window, the AD8191A physically assumes the state
indicated by the last set of values written to the configuration
registers. If the configuration registers are written after the delay
window ends, the AD8191A immediately updates and a new
delay window begins.
START
FIXED PART
ADDR
REGISTER ADDR
FIXED PART
ADDR
DATA
STOP
ACK
ADDR
ACK
R/W
ADDR
ACK
R/W
SR
1
2
3
4
5
6
7
8
9 10 11
12
13
I2C_SCL
GENERAL CASE
I2C_SDA
EXAMPLE
I2C_SDA
07
01
3-
0
30
Figure 30. I2C Read Diagram
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD8191AASTZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4:1 HDMI/DVI Switch with Equalization |
| AD8191AASTZ-RL | 功能描述:IC SWITCH HDMI/DVI 4:1 100LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 模擬開關(guān)，多路復(fù)用器，多路分解器 系列:- 其它有關(guān)文件:STG4159 View All Specifications 標(biāo)準(zhǔn)包裝:5,000 系列:- 功能:開關(guān) 電路:1 x SPDT 導(dǎo)通狀態(tài)電阻:300 毫歐 電壓電源:雙電源 電壓 - 電源，單路/雙路(±):±1.65 V ~ 4.8 V 電流 - 電源:50nA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:7-WFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:7-覆晶 包裝:帶卷 (TR) |
| AD8191AASTZ-RL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4:1 HDMI/DVI Switch with Equalization |
| AD8191ACPZ | 制造商:Analog Devices 功能描述:- Bulk |
| AD8191A-EVALZ | 制造商:Analog Devices 功能描述:EVAL BD FOR AD8191A - Bulk |
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