參數(shù)資料
型號(hào): AD8138AAR-EBZ
廠商: Analog Devices Inc
文件頁數(shù): 13/25頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD8138AAR
標(biāo)準(zhǔn)包裝: 1
每 IC 通道數(shù): 1 - 單
放大器類型: 差分
板類型: 裸(未填充)
已供物品:
已用 IC / 零件: 8-SOIC 封裝
AD8138
Rev. F | Page 19 of 24
LAYOUT, GROUNDING, AND BYPASSING
As a high speed part, the AD8138 is sensitive to the PCB
environment in which it has to operate. Realizing its superior
specifications requires attention to various details of good high
speed PCB design.
The first requirement is for a good solid ground plane that
covers as much of the board area around the AD8138 as
possible. The only exception to this is that the two input pins
(Pin 1 and Pin 8) should be kept a few millimeters from the
ground plane, and ground should be removed from inner layers
and the opposite side of the board under the input pins. This
minimizes the stray capacitance on these nodes and helps
preserve the gain flatness vs. frequency.
The power supply pins should be bypassed as close as possible
to the device to the nearby ground plane. Good high frequency
ceramic chip capacitors should be used. This bypassing should
be done with a capacitance value of 0.01 μF to 0.1 μF for each
supply. Further away, low frequency bypassing should be provided
with 10 μF tantalum capacitors from each supply to ground.
The signal routing should be short and direct to avoid parasitic
effects. Wherever there are complementary signals, a symmetrical
layout should be provided to the extent possible to maximize
the balance performance. When running differential signals
over a long distance, the traces on the PCB should be close
together or any differential wiring should be twisted together to
minimize the area of the loop that is formed. This reduces the
radiated energy and makes the circuit less susceptible to
interference.
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