參數(shù)資料
型號(hào)： AD8137YRZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 16/33頁(yè)
文件大小： 0K
描述： IC AMP DIFF R-R LP 20MA 8SOIC
標(biāo)準(zhǔn)包裝： 1,000
放大器類型： 差分
電路數(shù)： 1
輸出類型： 差分，滿擺幅
轉(zhuǎn)換速率： 450 V/µs
-3db帶寬： 110MHz
電流 - 輸入偏壓： 500nA
電壓 - 輸入偏移： 700µV
電流 - 電源： 3.2mA
電流 - 輸出 / 通道： 20mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 12 V，± 2.7 V ~ 6 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 帶卷 (TR)
AD8137
Data Sheet
Rev. E | Page 22 of 32
THEORY OF OPERATION
The AD8137 is a low power, low cost, fully differential voltage
feedback amplifier that features a rail-to-rail output stage,
common-mode circuitry with an internally derived common-
mode reference voltage, and bias shutdown circuitry. The amplifier
uses two feedback loops to separately control differential and
common-mode feedback. The differential gain is set with external
resistors as in a traditional amplifier, and the output common-
mode voltage is set by an internal feedback loop, controlled by
an external VOCM input. This architecture makes it easy to set
arbitrarily the output common-mode voltage level without
affecting the differential gain of the amplifier.
–OUT
+IN
ACM
VOCM
CC
CP
+OUT
–IN CN
04771-0-017
Figure 62. Block Diagram
From Figure 62, the input transconductance stage is an H-bridge
whose output current is mirrored to high impedance nodes CP
and CN. The output section is traditional H-bridge driven circuitry
with common emitter devices driving nodes +OUT and OUT.
The 3 dB point of the amplifier is defined as
C
m
C
g
BW
×
π
=
2
where:
gm is the transconductance of the input stage.
CC is the total capacitance on node CP/CN (capacitances CP
and CN are well matched).
For the AD8137, the input stage gm is ~1 mA/V and the
capacitance CC is 3.5 pF, setting the crossover frequency of the
amplifier at 41 MHz. This frequency generally establishes an
amplifier’s unity gain bandwidth, but with the AD8137, the
closed-loop bandwidth depends upon the feedback resistor
value as well (see Figure 17). The open-loop gain and phase
simulations are shown in Figure 63.
FREQUENCY (MHz)
100
80
–60
–40
–20
0
20
40
60
–120
–100
–80
–200
–180
–160
–140
0.0001
0.01
0.001
0.1
1
10
100
04771-0-021
OPEN-LOOP GAIN (dB)
PHASE (DEGREES)
Figure 63. Open-Loop Gain and Phase
In Figure 62, the common-mode feedback amplifier ACM
samples the output common-mode voltage, and by negative
feedback forces the output common-mode voltage to be equal
to the voltage applied to the VOCM input. In other words, the
feedback loop servos the output common-mode voltage to the
voltage applied to the VOCM input. An internal bias generator
sets the VOCM level to approximately midsupply; therefore, the
output common-mode voltage is set to approximately midsupply
when the VOCM input is left floating. The source resistance of the
internal bias generator is large and can be overridden easily by an
external voltage supplied by a source with a relatively small output
resistance. The VOCM input can be driven to within approximately
1 V of the supply rails while maintaining linear operation in the
common-mode feedback loop.
The common-mode feedback loop inside the AD8137 produces
outputs that are highly balanced over a wide frequency range
without the requirement of tightly matched external components,
because it forces the signal component of the output common-
mode voltage to be zeroed. The result is nearly perfectly balanced
differential outputs of identical amplitude and exactly 180°
apart in phase.
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