參數(shù)資料
型號(hào)： AD7998BRUZ-1REEL3
廠商： Analog Devices, Inc.
英文描述： 8-Channel, 10- and 12-Bit ADCs with I2CCompatible
中文描述： 8通道，10 -和12位ADC與I2CCompatible
文件頁(yè)數(shù)： 30/32頁(yè)
文件大小： 1056K
代理商： AD7998BRUZ-1REEL3
AD7997/AD7998
Rev. 0 | Page 30 of 32
9
1
1
A
9
S
W
A
A
Sr
R
A
A
SECOND DATA BYTE
(LSBs)
FIRST DATA BYTE
(MSBs)
COMMAND/ADDRESS
POINT BYTE
7-BIT ADDRESS
7-BIT ADDRESS
A
SDA
1
1
9
SCL
SDA
SCL
9
9
Sr/P
8
ACK BY
AD7997/AD7998
ACK BY
AD7997/AD7998
ACK BY
MASTER
NACK BY
MASTER
ACK BY
AD7997/AD7998
0
Figure 33. Mode 2 Operation
9
1
1
SCL
9
S
7-BIT ADDRESS
W A
COMMAND/ADDRESS
POINT BYTE
ACK BY
AD7997/AD7998
A
SDA
FIRST DATA BYTE
(MSBs)
A
SECOND DATA BYTE
(LSBs)
FIRST DATA BYTE
(MSBs)
SECOND DATA BYTE
(LSBs)
A
Sr
7-BIT ADDRESS
R A
SDA
9
9
1
1
SCL
9
8
ACK BY
AD7997/AD7998
ACK BY
MASTER
ACK BY
MASTER
ACK BY
MASTER
ACK BY
AD7997/AD7998
A
9
9
RESULT FROM CH1
RESULT FROM CH2
A/A
0
Figure 34. Mode 2 Sequence Operation
MODE 3—AUTOMATIC CYCLE INTERVAL MODE
An automatic conversion cycle can be selected and enabled by
writing a value to the cycle timer register. A conversion cycle
interval can be set up on the AD7997/AD7998 by programming
the relevant bits in the 8-bit cycle timer register, as decoded in
Table 24. Only the 3 LSBs are used to select the cycle interval;
the 5 MSBs should contain 0s. When the 3 LSBs of the register
are programmed with any configuration other than all 0s, a
conversion takes place every
X
ms; the cycle interval, X,
depends on the configuration of these three bits in the cycle
timer register. There are seven different cycle time intervals to
choose from, as shown in Table 24. Once the conversion has
taken place, the part powers down again until the next conver-
sion occurs. To exit this mode of operation, the user must
program the 3 LSBs of the cycle timer register to contain all 0s.
To select a channel(s) for operation in the cycle mode, set the
corresponding channel bit(s), D11 to D4, of the configuration
register. If more than one channel bit is set in the configuration
register, the ADC automatically cycles through the channel
sequence starting with the lowest channel and working its way
up through the sequence. Once the sequence is complete, the
ADC starts converting on the lowest channel again, continuing
to loop through the sequence until the cycle timer register
contents are set to all 0s. This mode is useful for monitoring
signals, such as battery voltage and temperature, alerting only
when the limits are violated.
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