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參數(shù)資料
| 型號： | AD7869JRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O PORT 14BIT ANLG 28SOIC |
| 標準包裝： | 1 |
| 應(yīng)用： | 模擬 I/O |
| 接口： | TTL/CMOS |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
(VDD = +5 V
5%, VSS = –5 V
5%, AGND = DGND = 0 V, Rl DAC = +3 V and decoupled as shown in Figure 2,
VOUT Load to AGND; = 2 k , CL = 100 pF. All specifications TMIN to TMAX unless otherwise noted.)
DAC SECTION
Parameter
J Versions
1
A Version
1
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio
3 (SNR) @ +25
°C 78
78
dB min
VOUT = 1 kHz Sine Wave, fSAMPLE = 83 kHz
TMIN to TMAX
78
77
dB min
Typically 82 dB at +25
°C for 0 < V
OUT < 20 kHz
4
Total Harmonic Distortion (THD)
–86
dB typ
VOUT = 1 kHz Sine Wave, fSAMPLE = 83 kHz
Typically –84 dB at +25
°C for 0 < V
OUT < 20 kHz
4
Peak Harmonic or Spurious Noise
–86
dB typ
VOUT = 1 kHz, fSAMPLE = 83 kHz
Typically –84 dB at +25
°C for 0 < V
OUT < 20 kHz
4
DC ACCURACY
Resolution
14
Bits
Integral Nonlinearity
± 2
LSB max
Differential Nonlinearity
± 1
LSB max
Guaranteed Monotonic
Bipolar Zero Error
±10
LSB max
Positive Full-Scale Error
5
±10
LSB max
Negative Full-Scale Error
5
±10
LSB max
REFERENCE OUTPUT
6
RO DAC @ +25
°C
2.99/3.01
V min/V max
RO DAC TC
±25
ppm/
°C typ
±40
ppm/
°C max
Reference Load Change
(
RO DAC vs. I)
–1.5
mV max
Reference Load Current Change (0
A–500 A)
REFERENCE INPUT
RI DAC Input Range
2.85/3.15
V min/V max 3 V
± 5%
Input Current
1
A max
LOGIC INPUTS
(
LDAC, TFS, TCLK, DT)
Input High Voltage, VINH
2.4
V min
VDD = 5 V ± 5%
Input Low Voltage, VINL
0.8
V max
VDD = 5 V ± 5%
Input Current, IIN
±10
A max
VIN = 0 V to VDD
Input Capacitance, CIN
7
10
pF max
ANALOG OUTPUT
Output Voltage Range
± 3
V nom
DC Output Impedance
0.3
typ
Short-Circuit Current
20
mA typ
AC CHARACTERISTICS
7
Voltage Output Settling-Time
Settling Time to Within
±1/2 LSB of Final Value
Positive Full-Scale Change
4
s max
Typically 3
s
Negative Full-Scale Change
4
s max
Typically 3.5
s
Digital-to-Analog Glitch Impulse
10
nV secs typ
DAC Code Change All 1s to All 0s
Digital Feedthrough
2
nV secs typ
VIN to VOUT Isolation
100
dB typ
VIN = ± 3 V, 41.5 kHz Sine Wave
POWER REQUIREMENTS
As per ADC Section
NOTES
1Temperature ranges are as follows: J Version, 0
°C to +70°C; A Version, –40°C to +85°C.
2V
OUT (p-p) = ± 3 V.
3SNR calculation includes distortion and noise components.
4Using external sample and hold, see Figures 13 to 15.
5Measured with respect to REF IN and includes bipolar offset error.
6For capacitive loads greater than 50 pF a series resistor is required (see Internal Reference section).
7Sample tested @ +25
°C to ensure compliance.
Specifications subject to change without notice
AD7869
–3–
REV. B
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