參數(shù)資料
型號： AD7858LBRZ
廠商： Analog Devices Inc
文件頁數(shù)： 20/32頁
文件大?。?/td> 0K
描述： IC ADC 12BIT 8CHAN SRL 24SOIC
標準包裝： 31
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： 8051，QSPI?，串行，SPI? µP
轉換器數(shù)目： 2
功率耗散（最大）： 33mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應商設備封裝： 24-SOIC W
包裝： 管件
輸入數(shù)目和類型： 8 個單端，單極；4 個偽差分，單極
AD7858/AD7858L
REV. B
–27–
Interface Mode 2 Configuration
Figure 35 shows the flowchart for configuring the part in Inter-
face Mode 2. In this case the read and write operations take
place simultaneously via the serial port. Writing all 0s ensures
that no valid data is written to any of the registers. When using
the software conversion start and transferring data during con-
version Note 1 must be obeyed.
APPLY
SYNC (IF REQUIRED), SCLK, WRITE
TO CONTROL REGISTER SETTING CHANNEL,
(SEE NOTE 1)
INITIATE
CONVERSION
IN
SOFTWARE
?
START
POWER-ON, APPLY CLKIN SIGNAL,
WAIT FOR AUTOMATIC CALIBRATION
PULSE
CONVST PIN
WAIT FOR BUSY SIGNAL TO GO LOW
OR
WAIT FOR BUSY BIT = 0
NO
SERIAL
INTERFACE
MODE
?
TRANSFER
DATA DURING
CONVERSION
?
NO
YES
APPLY
SYNC (IF REQUIRED), SCLK,
READ CURRENT CONVERSION RESULT
ON DOUT PIN, AND WRITE CHANNEL
SELECTION
NOTES
1WHEN USING THE SOFTWARE CONVERSION START AND TRANSFERRING DATA DURING CONVERSION THE USER MUST ENSURE THE CONTROL REGISTER
WRITE OPERATION EXTENDS BEYOND THE FALLING EDGE OF BUSY. THE FALLING EDGE OF BUSY RESETS THE CONVST BIT TO 0 AND ONLY AFTER THIS
TIME CAN IT BE REPROGRAMMED TO 1 TO START THE NEXT CONVERSION.
2TWO SEPARATE WRITES ARE REQUIRED TO SET A NEW CHANNEL ADDRESS AND INITIATE A CONVERSION ON THAT NEW CHANNEL IN SOFTWARE AS
THE ACQUISITION TIME (2
tCLKIN) MUST ELAPSE BEFORE THE CONVERSION BEGINS. IF BOTH COMMANDS ARE ISSUED IN THE ONE WRITE THE
RESULT OF THIS CONVERSION SHOULD BE DISCARDED AND THE NEXT CONVERSION ON THAT SAME CHANNEL WILL PROVIDE CORRECT RESULTS.
WAIT APPROX 200ns AFTER
CONVST RISING EDGE
APPLY
SYNC (IF REQUIRED), SCLK, READ
PREVIOUS CONVERSION RESULT ON DOUT
PIN, AND WRITE CHANNEL SELECTION
NO
APPLY
SYNC (IF REQUIRED), SCLK, WRITE
TO CONTROL REGISTER SETTING CHANNEL
WAIT FOR BUSY SIGNAL TO GO LOW
OR
WAIT FOR BUSY BIT = 0
YES
2
WRITE TO CONTROL REGISTER SETTING
CONVST BIT TO 1, READ
CURRENT CONVERSION RESULT
ON DOUT PIN (SEE NOTE 2)
WRITE TO CONTROL REGISTER
SETTING CONVST BIT TO 1,
READ PREVIOUS RESULT ON
DOUT PIN (SEE NOTES 1&2)
TRANSFER
DATA DURING
CONVERSION
?
Figure 35. Flowchart for Setting Up, Reading, and Writing in Interface Mode 2
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