參數(shù)資料
型號(hào): AD7738BRU-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 28/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 8CH SIG-DEL 28TSSOP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 24
采樣率(每秒): 15.4k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 100mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 8 個(gè)單端,單極;8 個(gè)單端,雙極;4 個(gè)差分,單極;4 個(gè)差分,雙極
配用: EVAL-AD7738EBZ-ND - BOARD EVAL FOR AD7738
REV. 0
AD7738
–9–
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7738 can be operated with chopping enabled or disabled, allowing the ADC to be programmed either to optimize the
throughput rate and channel switching time or to optimize offset drift performance. Noise tables for these two primary modes of
operation are outlined below for a selection of output rates and settling times.
CHOPPING ENABLED
The first mode, in which the AD7738 is configured with chopping enabled (CHOP = 1), provides very low noise numbers with lower
output rates. Tables I to III show the –3 dB frequencies and typical performance versus channel conversion time or equivalent output
data rate, respectively. Table I shows the typical output rms noise. Table II shows the typical effective resolution based on the rms
noise. Table III shows the typical output peak-to-peak resolution, representing values for which there will be no code flicker within a
six-sigma limit. The peak-to-peak resolutions are not calculated based on rms noise, but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples acquired in Continuous Conversion mode with an analog input voltage
set to 0 V and MCLK = 6.144 MHz. The Conversion Time is selected via the Channel Conversion Time register.
Table I. Typical Output RMS Noise in
V vs. Conversion Time and Input Range with
Chopping Enabled
Conversion
Output
–3 dB
Input Range
Time
Data Rate
Frequency
FW
Register
( s)
(Hz)
2.5 V, +2.5 V
1.25 V, +1.25 V,
625 mV, +625 mV
127
FFh
2686
372
194
1.8
1.1
46
AEh
999
1001
521
3.0
1.8
17
91h
395
2534
1317
5.1
3.0
8
88h
207
4826
2510
8.1
4.5
4
84h
124
8074
4198
9.3
5.3
2
82h
82
12166
6326
17.0
10.6
Table II. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with
Chopping Enabled
Conversion
Output
–3 dB
Input Range
Time
Data Rate
Frequency
FW
Register
( s)
(Hz)
2.5 V
+2.5 V
1.25 V
+1.25 V
625 mV
+625 mV
127
FFh
2686
372
194
21.4
20.4
21.1
20.1
19.1
46
AEh
999
1001
521
20.6
19.6
20.4
19.4
18.4
17
91h
395
2534
1317
19.9
18.9
19.6
18.6
17.6
8
88h
207
4826
2510
19.2
18.2
19.0
18.0
17.0
4
84h
124
8074
4198
19.0
18.0
18.8
17.8
16.8
2
82h
82
12166
6326
18.1
17.1
17.8
16.8
15.8
Table III. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with
Chopping Enabled
Conversion
Output
–3 dB
Input Range
Time
Data Rate
Frequency
FW
Register
( s)
(Hz)
2.5 V
+2.5 V
1.25 V
+1.25 V
625 mV
+625 mV
127
FFh
2686
372
194
18.4
17.4
18.2
17.2
16.2
46
AEh
999
1001
521
17.8
16.8
17.5
16.5
15.5
17
91h
395
2534
1317
16.8
15.8
16.7
15.7
14.7
8
88h
207
4826
2510
16.5
15.5
16.2
15.2
14.2
4
84h
124
8074
4198
16.0
15.0
16.0
15.0
14.0
2
82h
82
12166
6326
15.0
14.0
15.0
14.0
13.0
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