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| 型號： | AD7719BR-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/40頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 24BIT DUAL 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 400 |
| 位數(shù)： | 16/24 |
| 采樣率（每秒）： | 105 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 4.5mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 3 個差分，單極；3 個差分，雙極 |
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REV. A
AD7719
–25–
Table XVI. IOCON (I/O and Current Source Control Register) Bit Designations
Bit
Location
Name
Description
IOCON15
PSW2
Power Switch 2 Control Bit.
Set by user to enable power switch P2 to PWRGND.
Cleared by user to enable use as a standard I/O pin.
When the ADC is in standby mode, the power switches are open.
IOCON14
PSW1
Power Switch 1 Control Bit.
Set by user to enable power switch P1 to PWRGND.
Cleared by user to enable use as a standard I/O pin.
When ADC is in standby mode, the power switches are open.
IOCON13
0
This bit must be zero for correct operation.
IOCON12
BO
Burnout Current Enable Bit.
Set by user to enable the 100 nA current sources in the main ADC signal path. A 100 nA current source is
applied to the positive input leg while a 100 nA sink is applied to the negative input.
Cleared by user to disable both transducer burnout current sources.
IOCON11
I2PIN
IEXE2, 200 A Current Source Direction Bit.
Set by user to enable IEXC2 current source to IOUT1.
Cleared by user to enable IEXC2 current source to IOUT2.
IOCON10
I1PIN
IEXE1, 200 A Current Source Direction Bit.
Set by user to enable IEXC1 current source to IOUT2.
Cleared by user to enable IEXC1 current source to IOUT1.
IOCON9
I2EN
IEXC2 Current Source Enable Bit.
Set by user to turn on the IEXC2 excitation current source.
Cleared by user to turn off the IEXC2 excitation current source.
IOCON8
I1EN
IEXC1 Current Source Enable Bit.
Set by user to turn on the IEXC1 excitation current source.
Cleared by user to turn off the IEXC1 excitation current source.
IOCON7
P4DIR
P4, I/O Direction Control Bit.
Set by user to enable P4 as an output.
Cleared by user to enable P4 as an input. There are weak active pull-ups internally when enabled as an input.
IOCON6
P3DIR
P3, I/O Direction Control Bit.
Set by user to enable P3 as an output.
Cleared by user to enable P3 as an input. There are weak active pull-ups internally when enabled as an input.
IOCON5
P2EN
P2 Digital Output Enable Bit.
Set by user to enable P2 as a regular digital output pin.
Cleared by user to three-state P2 output.
PSW2 takes precedence over P2EN.
IOCON4
P1EN
P1 Digital Output Enable Bit.
Set by user to enable P1 as a regular digital output pin.
Cleared by user to three-state P1 output.
PSW1 takes precedence over P1EN.
IOCON3
P4DAT
Digital I/O Port Data Bits.
IOCON2
P3DAT
The readback values of these bits indicate the status of their respective pin when the I/O port is active as
IOCON1
P2DAT
an input.
IOCON0
P1DAT
The values written to these data bits appear at the output port when the I/O bits are enabled as outputs.
P2 and P1 are outputs only, so reading P2DAT and P1DAT will return what was last written to these bits.
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