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參數(shù)資料
| 型號： | AD7716BPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 22BIT SIGMA-DELTA 44-PLCC |
| 標準包裝： | 1 |
| 位數(shù)： | 22 |
| 采樣率（每秒）： | 2.23k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 功率耗散（最大）： | 50mW |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 4 個單端，雙極 |
| 產(chǎn)品目錄頁面： | 778 (CN2011-ZH PDF) |
AD7716–SPECIFICATIONS1, 2 (f
CLKIN = 8 MHz; MODE Pin Is High (Slave Mode Operation); AVDD = DVDD = +5 V
5%; AVSS = –5 V
5%; AGND = DGND = 0 V; VREF = 2.5 V; Filter Cutoff = 146 Hz; Noise Measurement Bandwidth = 146 Hz; AIN Source
Resistance = 750
2 with 1 nF to AGND at each A
IN. TA = TMIN to TMAX, unless otherwise noted.)
Parameter
B Version
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution
22
Bits
Integral Linearity Error
0.003
% FSR typ
Guaranteed No Missed Codes to 21 Bits3
0.006
% FSR max
Gain Error
1
% FSR max
Gain Match Between Channels
0.5
% FSR max
Gain TC
30
V/°C typ
Offset Error
0.2
% FSR max
Offset Match Between Channels
0.1
% FSR max
Offset TC
4
V/°C typ
Noise
11
V rms max
See Table I for Typical Noise Performance vs. Programmed
Cutoff Frequency
DYNAMIC PERFORMANCE
Sampling Rate
fCLKIN/14
570 kHz for fCLKIN = 8 MHz
Output Update Rate
fCLKIN/(14
256
2N)
N Is Decimal Equivalent of FC2, FC1, FC0 in Control Register
Filter Cutoff Frequency
fCLKIN/(3.81
14
256
2N)
Settling Time
(3
14
256
2N/fCLKIN)
Usable Dynamic Range4
See Table I
Total Harmonic Distortion
–90
dB typ
Input Frequency = 35 Hz
–100
dB typ
AIN =
±10 mV p-p
Absolute Group Delay3
(3
14
256
2N)/2fCLKIN
Differential Group Delay3
10
ns typ
Channel-to-Channel Isolation
–85
dB typ
Feedthrough from Any One Channel to the Other Three, with
35 Hz Full-Scale Sine Wave Applied to that Channel
ANALOG INPUT
Input Range
±2.5
Volts
Input Capacitance
10
pF typ
Input Bias Current
1
nA typ
LOGIC INPUTS
VINH, Input High Voltage
2.4
V min
VINL, Input Low Voltage
0.8
V max
IIN, Input Current
SDATA, RFS
+10/-130
A max
Internal 50 k
Pull-Up Resistors
TFS
+10/-650
A max
Internal 10 k
Pull-Up Resistor
All Other Inputs
±10
A max
CIN, Input Capacitance
3
10
pF max
LOGIC OUTPUTS
VOH, Output High Voltage
2.4
V min
|IOUT|
≤ 40 A
VOL, Output Low Voltage
0.4
V max
|IOUT|
≤ 1.6 mA
POWER SUPPLIES
Reference Input
2.4/2.6
V min/V max
AVDD
4.75/5.25
V min/V max
DVDD
4.75/5.25
V min/V max
AVSS
–4.75/–5.25
V min/V max
IDD
7.5
mA max
4.8 mA typ
ISS
2.5
mA max
1.8 mA typ
Power Consumption
50
mW max
35 mW typ
Power Supply Rejection
5
–70
dB typ
NOTES
1Operating temperature ranges as follows : B Version; –40
°C to +85°C.
2The AIN pins present a very high impedance dynamic load which varies with clock frequency.
3Guaranteed by design and characterization. Digital filter has linear phase.
4Usable dynamic range is guaranteed by measuring noise and relating this to the full-scale input range.
5100 mV p-p, 120 Hz sine wave applied to each supply.
Specifications subject to change without notice.
REV. A
–2–
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