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參數(shù)資料
| 型號： | AD7711A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Signal Conditioning ADC with RTD Current Source(帶RTD電流源信號調(diào)節(jié)A/D轉(zhuǎn)換器) |
| 中文描述： | 信號調(diào)理ADC，具有電阻電流源（帶電阻電流源信號調(diào)節(jié)的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 19/27頁 |
| 文件大?。?/td> | 237K |
| 代理商： | AD7711A |
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2
AD7711A
–19–
REV. C
In the bipolar mode, the system offset calibration range is again
restricted by the span range. The span range of the converter in
bipolar mode is equidistant around the voltage used for the zero
scale point thus the offset range plus half the span range cannot
exceed (1.05
×
V
REF
/GAIN). If the span is set to
2 ×
V
REF
/GAIN,
the offset span cannot move more than
±
(0.05
×
V
REF
/GAIN)
before the endpoints of the transfer function exceed the input
overrange limits
±
(1.05
×
V
REF
/GAIN). If the span range is set
to the minimum
±
(0.4
×
V
REF
/GAIN) the maximum
allowable
offset range is
±
(0.65
×
V
REF
/GAIN).
POWER-UP AND CALIBRATION
On power-up, the AD7711A performs an internal reset which
sets the contents of the control register to a known state. How-
ever, to ensure correct calibration for the device a calibration
routine should be performed after power-up.
The power dissipation and temperature drift of the AD7711A
are low and no warm up time is required before the initial cali-
bration is performed. However, if an external reference is being
used, this reference must have stabilized before calibration is
initiated.
Drift Considerations
The AD7711A uses chopper stabilization techniques to mini-
mize input offset drift. Charge injection in the analog switches
and dc leakage currents at the sampling node are the primary
sources of offset voltage drift in the converter. The dc input
leakage current is essentially independent of the selected gain.
Gain drift within the converter depends primarily upon the
temperature tracking of the internal capacitors. It is not affected
by leakage currents.
Measurement errors due to offset drift or gain drift can be elimi-
nated at any time by recalibrating the converter or by operating
the part in the background calibration mode. Using the system
calibration mode can also minimize offset and gain errors in the
signal conditioning circuitry. Integral and differential linearity
errors are not significantly affected by temperature changes.
POWER SUPPLIES AND GROUNDING
Since the analog inputs and reference input are differential,
most of the voltages in the analog modulator are common-mode
voltages. V
BIAS
provides the return path for most of the analog
currents flowing in the analog modulator. As a result, the V
BIAS
input should be driven from a low impedance to minimize errors
due to charging/discharging impedances on this line. When the
internal reference is used as the reference source for the part,
AGND is the ground return for this reference voltage.
Table VI. Calibration Truth Table
Cal Type
MD2, MD1, MD0
Zero Scale Cal
Full-Scale Cal
Sequence
Duration
9
×
1/Output Rate
4
×
1/Output Rate
4
×
1/Output Rate
9
×
1/Output Rate
6
×
1/Output Rate
Self-Cal
System Cal
System Cal
System Offset Cal
Background Cal
0, 0, 1
0, 1, 0
0, 1, 1
1, 0, 0
1, 0, 1
Shorted Inputs
AIN
–
AIN
Shorted Inputs
V
REF
–
AIN
V
REF
V
REF
One Step
Two Step
Two Step
One Step
One Step
The analog and digital supplies to the AD7711A are indepen-
dent and separately pinned out to minimize coupling between
the analog and digital sections of the device. The digital filter
will provide rejection of broadband noise on the power supplies,
except at integer multiples of the modulator sampling frequency.
The digital supply (DV
DD
) must not exceed the analog positive
supply (AV
DD
) by more than 0.3 V in normal operation. If sepa-
rate analog and digital supplies are used, the recommended
decoupling scheme is shown in Figure 9. In systems where
AV
DD
= +5 V and DV
DD
= +5 V, it is recommended that AV
DD
and DV
DD
are driven from the same +5 V supply, although each
supply should be decoupled separately as shown in Figure 9. It
is preferable that the common supply is the system’s analog +5 V
supply.
It is also important that power is applied to the AD7711A be-
fore signals at REF IN, AIN or the logic input pins in order to
avoid excessive current. If separate supplies are used for the
AD7711A and the system digital circuitry, then the AD7711A
should be powered up first. If it is not possible to guarantee this,
then current limiting resistors should be placed in series with the
logic inputs.
AD7711A
AV
DD
DV
DD
0.1
m
F
10
m
F
ANALOG
SUPPLY
0.1
m
F
DIGITAL +5V
SUPPLY
Figure 9. Recommended Decoupling Scheme
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7711AAN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 24-Bit |
| AD7711AAR | 功能描述:IC ADC 24BIT RTD I SOURCE 24SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD7711AARZ | 功能描述:IC ADC 24BIT RTD I SOURCE 24SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7711AN | 功能描述:IC ADC 24BIT RTD I SOURCE 24-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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