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參數(shù)資料
| 型號： | AD7711A* |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | LC2MOS Signal Conditioning ADC with RTD Current Source |
| 中文描述： | LC2MOS信號調(diào)理ADC的電流源電阻 |
| 文件頁數(shù)： | 16/27頁 |
| 文件大?。?/td> | 222K |
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REV. C
AD7711A
–16–
Bipolar/Unipolar Inputs
The two analog inputs on the AD7711A can accept either uni-
polar or bipolar input voltage ranges. Bipolar or unipolar op-
tions are chosen by programming the B/U bit of the control
register. This programs both channels for either unipolar or
bipolar operation. Programming the part for either unipolar or
bipolar operation does not change any of the input signal condi-
tioning; it simply changes the data output coding. The data
coding is binary for unipolar inputs and offset binary for bipolar
inputs.
The input channels are differential and, as a result, the voltage
to which the unipolar and bipolar signals are referenced is the
voltage on the AIN(–) input. For example, if AIN(–) is +1.25 V
and the AD7711A is configured for unipolar operation with a
gain of 1 and a V
REF
of +2.5 V, the input voltage range on the
AIN(+) input is +1.25 V to +3.75 V. If AIN(–) is +1.25 V and
the AD7711A is configured for bipolar mode with a gain of 1
and a V
REF
of +2.5 V, the analog input range on the AIN(+)
input is –1.25 V to +3.75 V.
REFERENCE INPUT/OUTPUT
The AD7711A contains a temperature compensated +2.5 V
reference which has an initial tolerance of
±
1%. This reference
voltage is provided at the REF OUT pin and it can be used as
the reference voltage for the part by connecting the REF OUT
pin to the REF IN(+) pin. This REF OUT pin is a single-ended
output, referenced to AGND, which is capable of providing up
to 1 mA to an external load. In applications where REF OUT is
connected to REF IN(+), REF IN(–) should be tied to AGND
to provide the nominal +2.5 V reference for the AD7711A.
The reference inputs of the AD7711A, REF IN(+) and REF
IN(–), provide a differential reference input capability. The
common-mode range for these differential inputs is from V
SS
to
AV
DD
. The nominal differential voltage, V
REF
(REF IN(+) –
REF IN(–)), is +2.5 V for specified operation, but the reference
voltage can go to +5 V with no degradation in performance pro-
vided that the absolute value of REF IN(+) and REF IN(–) does
not exceed its AV
DD
and V
SS
limits and the V
BIAS
input voltage
range limits are obeyed. The part is also functional with V
REF
voltages down to 1 V but with degraded performance as the
output noise will, in terms of LSB size, be larger. REF IN(+) must
always be greater than REF IN(–) for correct operation of the
AD7711A.
Both reference inputs provide a high impedance, dynamic load
similar to the analog inputs. The maximum dc input leakage
current is 10 pA (
±
1 nA over temperature) and source resis-
tance may result in gain errors on the part. The reference inputs
look like the analog input (see Figure 7). In this case, R
INT
is
5 k
typ and C
INT
varies with gain. The input sample rate is
f
CLK IN
/256 and does not vary with gain. For gains of 1 to 8 C
INT
is 20 pF; for a gain of 16 it is 10 pF; for a gain of 32 it is 5 pF;
for a gain of 64 it is 2.5 pF; and for a gain of 128 it is 1.25 pF.
The digital filter of the AD7711A removes noise from the refer-
ence input just as it does with the analog input, and the same
limitations apply regarding lack of noise rejection at integer
multiples of the sampling frequency. The output noise perfor-
mance outlined in Tables I and II assumes a clean reference. If
the reference noise in the bandwidth of interest is excessive, it
can degrade the performance of the AD7711A. Using the on-
chip reference as the reference source for the part (i.e., connect-
ing REF OUT to REF IN) results in somewhat degraded output
noise performance from the AD7711A for portions of the noise
table which are dominated by the device noise. The on-chip
reference noise effect is eliminated in ratiometric applications
where the reference is used to provide the excitation voltage for
the analog front end. The connection scheme shown in Figure 8
is recommended when using the on-chip reference. Recom-
mended reference voltage sources for the AD7711A include the
AD780 and AD680 2.5 V references.
AD7711A
REF OUT
REF IN(+)
REF IN(–)
Figure 8. REF OUT/REF IN Connection
V
BIAS
Input
The V
BIAS
input determine at what voltage the internal analog
circuitry is biased. It essentially provides the return path for
analog currents flowing in the modulator and, as such, it should
be driven from a low impedance point to minimize errors.
For maximum internal headroom, the V
BIAS
voltage should be
set halfway between AV
DD
and V
SS
. The difference between
AV
DD
and (V
BIAS
+ 0.85
×
V
REF
) determines the amount of
headroom the circuit has at the upper end, while the difference
between V
SS
and (V
BIAS
– 0.85
×
V
REF
) determines the amount
of headroom the circuit has at the lower end. Care should be
taken in choosing a V
BIAS
voltage to ensure that it stays within
prescribed limits. For single +5 V operation, the selected V
BIAS
voltage must ensure that V
BIAS
±
0.85
×
V
REF
does not exceed
AV
DD
or V
SS
or that the V
BIAS
voltage itself is greater than V
SS
+ 2.1 V and less than AV
DD
– 2.1 V. For single +10 V operation
or dual
±
5 V operation, the selected V
BIAS
voltage must ensure
that V
BIAS
±
0.85
×
V
REF
does not exceed AV
DD
or V
SS
or that
the V
BIAS
voltage itself is greater than V
SS
+ 3 V or less than
AV
DD
–3 V. For example, with AV
DD
= +4.75 V, V
SS
= 0 V
and V
REF
= +2.5 V, the allowable range for the V
BIAS
voltage is
+2.125 V to +2.625 V. With AV
DD
= +9.5 V, V
SS
= 0 V and
V
REF
= +5 V, the range for V
BIAS
is +4.25 V to +5.25 V. With
AV
DD
= +4.75 V, V
SS
= –4.75 V and V
REF
= +2.5 V, the V
BIAS
range is –2.625 V to +2.625 V.
The V
BIAS
voltage does have an effect on the AV
DD
power sup-
ply rejection performance of the AD7711A. If the V
BIAS
voltage
tracks the AV
DD
supply, it improves the power supply rejection
from the AV
DD
supply line from 80 dB to 95 dB. Using an ex-
ternal Zener diode, connected between the AV
DD
line and V
BIAS
as the source for the V
BIAS
voltage gives the improvement in
AV
DD
power supply rejection performance.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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