參數(shù)資料
型號(hào)： AD7711
廠商： Analog Devices, Inc.
英文描述： LC2MOS Signal Conditioning ADC with RTD Excitation Currents(RTD激勵(lì)電流LC2MOS信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器)
中文描述： LC2MOS信號(hào)調(diào)理模數(shù)轉(zhuǎn)換器（RTD的激勵(lì)電流LC2MOS信號(hào)調(diào)節(jié)的A / D轉(zhuǎn)換器與RTD激勵(lì)電流）
文件頁(yè)數(shù)： 12/28頁(yè)
文件大小： 256K
代理商： AD7711
REV. F
–12–
AD7711
Figure 2 gives similar information to that outlined in Table I. In this plot, the output rms noise is shown for the full range of available
cutoffs frequencies rather than for some typical cutoff frequencies as in Tables I and II. The numbers given in these plots are typical
values at 25
°
C.
NOTCH FREQUENCY – Hz
10000
1000
0.110
10000
100
O
m
V
1000
100
10
1
GAIN OF 1
GAIN OF 2
GAIN OF 4
GAIN OF 8
Figure 2a. Plot of Output Noise vs. Gain and Notch
Frequency (Gains of 1 to 8)
CIRCUIT DESCRIPTION
The AD7711 is a sigma-delta A/D converter with on-chip digital
filtering, intended for the measurement of wide dynamic range,
low frequency signals such as those in RTD applications, indus-
trial control or process control applications. It contains a sigma-
delta (or charge-balancing) ADC, a calibration microcontroller
with on-chip static RAM, a clock oscillator, a digital filter and a
bidirectional serial communications port.
The part contains two analog input channels, a programmable
gain differential analog input and a programmable gain single
ended input. The gain range is from 1 to 128 allowing the part
to accept unipolar signals of between 0 mV to +20 mV and 0 V
to +2.5 V or bipolar signals in the range from
±
20 mV to
±
2.5 V
when the reference input voltage equals +2.5 V. The input
signal to the selected analog input channel is continuously
sampled at a rate determined by the frequency of the master
clock, MCLK IN, and the selected gain (see Table III). A
charge balancing A/D converter (Sigma-Delta Modulator) con-
verts the sampled signal into a digital pulse train whose duty
cycle contains the digital information. The programmable gain
function on the analog input is also incorporated in this sigma-
delta modulator with the input sampling frequency being modi-
fied to give the higher gains. A sinc
3
digital low-pass filter
processes the output of the sigma-delta modulator and updates
the output register at a rate determined by the first notch fre-
quency of this filter. The output data can be read from the serial
port randomly or periodically at any rate up to the output regis-
ter update rate. The first notch of this digital filter (and hence
its –3 dB frequency) can be programmed via an on-chip control
register. The programmable range for this first notch frequency
is from 9.76 Hz to 1.028 kHz, giving a programmable range for
the –3 dB frequency of 2.58 Hz to 269 Hz.
The basic connection diagram for the part is shown in Figure 3.
This shows the AD7711 in the external clocking mode with
both the AV
DD
and DV
DD
pins of the AD7711 being driven
from the analog +5 V supply. Some applications will have
NOTCH FREQUENCY – Hz
1000
0.1
10
10000
100
O
m
V
1000
100
10
1
GAIN OF 16
GAIN OF 32
GAIN OF 128
GAIN OF 64
Figure 2b. Plot of Output Noise vs. Gain and Notch
Frequency (Gains of 16 to 128)
separate supplies for both AV
DD
and DV
DD
, and in some of
these cases, the analog supply will exceed the +5 V digital sup-
ply (see Power Supplies and Grounding section).
ANALOG
+5V SUPPLY
10
m
F
0.1
m
F
0.1
m
F
AV
DD
DV
DD
AIN1(+)
AIN1(–)
AIN2
RTD1
RTD2
AGND
V
DGND
REF OUT
REF IN(+)
V
BIAS
REF IN(–)
DRDY
TFS
RFS
SDATA
SCLK
A0
MODE
SYNC
MCLK OUT
MCLK IN
AD7711
DIFFERENTIAL
ANALOG INPUT
SINGLE-ENDED
ANALOG INPUT
ANALOG GROUND
DIGITAL GROUND
DATA READY
TRANSMIT (WRITE)
RECEIVE (READ)
SERIAL DATA
SERIAL CLOCK
ADDRESS INPUT
+5V
Figure 3. Basic Connection Diagram
The AD7711 provides a number of calibration options which
can be programmed via the on-chip control register. A calibra-
tion cycle may be initiated at any time by writing to this control
register. The part can perform self-calibration using the on-chip
calibration microcontroller and SRAM to store calibration pa-
rameters. Other system components may also be included in the
calibration loop to remove offset and gain errors in the input
channel using the system calibration mode. Another option is a
background calibration mode where the part continuously per-
forms self-calibration and updates the calibration coefficients.
Once the part is in this mode, the user does not have to worry
about issuing periodic calibration commands to the device or
asking the device to recalibrate when there is a change in the
ambient temperature or power supply voltage.
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