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AD7691
ANALOG INPUTS
Figure 28 shows an equivalent circuit of the input structure of
the AD7691.
Rev. 0 | Page 15 of 28
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN. Care must be taken to ensure that
the analog input signal does not exceed the supply rails by more
than 0.3 V because this causes the diodes to become forward
biased and start conducting current. These diodes can handle a
forward-biased current of 130 mA maximum. For instance,
these conditions could eventually occur if the input buffer’s
(U1’s) supplies are different than VDD. In such a case—for
example, an input buffer with a short circuit—the current
limitation can be used to protect the part.
C
IN
R
IN
D1
D2
C
PIN
IN+
OR IN–
GND
VDD
0
Figure 28. Equivalent Analog Input Circuit
The analog input structure allows the sampling of the true
differential signal between IN+ and IN. By using these
differential inputs, signals common to both inputs are rejected.
90
40
1
10000
FREQUENCY (kHz)
C
10
100
1000
85
80
75
70
65
60
55
50
45
V
REF
= VDD = 5V
0
Figure 29. Analog Input CMRR vs. Frequency
During the acquisition phase, the impedance of the analog
inputs (IN+ and IN) can be modeled as a parallel combination
of the capacitor, C
PIN
, and the network formed by the series
connection of R
IN
and C
IN
. C
PIN
is primarily the pin capacitance.
R
IN
is typically 3 kΩ and is a lumped component made up of
serial resistors and the on resistance of the switches. C
IN
is
typically 30 pF and is mainly the ADC sampling capacitor.
During the conversion phase, where the switches are opened, the
input impedance is limited to C
PIN
. R
IN
and C
IN
make a 1-pole,
low-pass filter that reduces undesirable aliasing effects and
limits the noise.
When the source impedance of the driving circuit is low, the
AD7691 can be driven directly. Large source impedances
significantly affect the ac performance, especially total
harmonic distortion (THD). The dc performances are less
sensitive to the input impedance. The maximum source
impedance depends on the amount of THD that can be
tolerated. The THD degrades as a function of the source
impedance and the maximum input frequency.
DRIVER AMPLIFIER CHOICE
Although the AD7691 is easy to drive, the driver amplifier must
meet the following requirements:
The noise generated by the driver amplifier needs to be
kept as low as possible to preserve the SNR and transition
noise performance of the AD7691. The noise coming from
the driver is filtered by the AD7691 analog input circuit’s
1-pole, low-pass filter made by R
IN
and C
IN
or by the
external filter, if one is used. The SNR degradation due to
the amplifier is as follows:
+
+
=
+
2
dB
3
2
dB
3
2
)
(
2
π
)
(
2
π
log
20
N
N
NADC
V
NADC
V
LOSS
Ne
f
Ne
f
SNR
where:
V
NADC
is the noise of the ADC, in μV, given by the following:
V
20
10
2
2
SNR
INpp
NADC
V
=
f
3 dB
is the input bandwidth, in MHz, of the AD7691
(2 MHz) or the cutoff frequency of the input filter, if one is
used.
N
is the noise gain of the amplifier (for example, 1 in
buffer configuration).
e
N+
and
e
N
are the equivalent input noise voltage densities
of the op amps connected to IN+ and IN, in nV/√Hz.
This approximation can be used when the resistances
around the amplifier are small. If larger resistances are
used, their noise contributions should also be root-sum-
squared.
For ac applications, the driver should have a THD
performance commensurate with the AD7691.
For multichannel multiplexed applications, the driver
amplifier and the AD7691 analog input circuit must settle
for a full-scale step onto the capacitor array at an 18-bit
level (0.0004%, 4 ppm). In the amplifier’s data sheet,
settling at 0.1% to 0.01% is more commonly specified. This
could differ significantly from the settling time at an 18-bit
level and should be verified prior to driver selection.