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參數資料
型號: AD7679ASTZ
廠商: Analog Devices Inc
文件頁數: 26/28頁
文件大?。?/td> 0K
描述: IC ADC 18BIT 570KSPS 48-LQFP
標準包裝: 1
系列: PulSAR®
位數: 18
采樣率(每秒): 570k
數據接口: 串行,并聯(lián)
轉換器數目: 1
功率耗散(最大): 103mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 托盤
輸入數目和類型: 1 個差分,雙極
產品目錄頁面: 778 (CN2011-ZH PDF)
配用: EVAL-AD7679CBZ-ND - BOARD EVALUATION FOR AD7679
AD7679
Rev. A | Page 7 of 28
ABSOLUTE MAXIMUM RATINGS
Table 5.AD7679 Absolute Maximum Ratings1
TO OUTPUT
PIN
CL
60pF1
500
μA
IOH
1.6mA
IOL
1.4V
IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.
1
03085–0–002
Parameter
Rating
Analog Inputs
IN+2, IN–2, REF, REFBUFIN, REFGND to
AGND
AVDD + 0.3 V to AGND
– 0.3 V
Ground Voltage Differences
AGND, DGND, OGND
±0.3 V
Supply Voltages
AVDD, DVDD, OVDD
–0.3 V to +7 V
AVDD to DVDD, AVDD to OVDD
±7 V
DVDD to OVDD
–0.3 V to +7 V
Digital Inputs
–0.3 V to DVDD + 0.3 V
Internal Power Dissipation3
700 mW
Internal Power Dissipation4
2.5 W
Junction Temperature
150°C
Storage Temperature Range
–65°C to +150°C
Lead Temperature Range
(Soldering 10 sec)
300°C
Figure 2. Load Circuit for Digital Interface Timing
SDOUT, SYNC, SCLK Outputs, CL = 10 pF
0.8V
2V
0.8V
t
DELAY
2V
0.8V
t
DELAY
03085–0–003
Figure 3. Voltage Reference Levels for Timing
1 Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those
indicated in the operational section of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
ESD CAUTION
2 See Analog Inputs section.
3 Specification is for device in free air: 48-Lead LQFP: θJA = 91°C/W,
θJC = 30°C/W.
3 Specification is for device in free air: 48-Lead LFCSP: θJA = 26°C/W.
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