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Data Sheet
AD7607
Rev. B | Page 7 of 32
Limit at TMIN, TMAX
Parameter
Min
Typ
Max
Unit
Description
t13
Delay from CS until DB[15:0] three-state disabled
16
ns
VDRIVE above 4.75 V
20
ns
VDRIVE above 3.3 V
25
ns
VDRIVE above 2.7 V
30
ns
VDRIVE above 2.3 V
Data access time after RD falling edge
16
ns
VDRIVE above 4.75 V
21
ns
VDRIVE above 3.3 V
25
ns
VDRIVE above 2.7 V
32
ns
VDRIVE above 2.3 V
t15
6
ns
Data hold time after RD falling edge
t16
6
ns
CS to DB[15:0] hold time
t17
22
ns
Delay from CS rising edge to DB[15:0] three-state enabled
SERIAL READ OPERATION
fSCLK
Frequency of serial read clock
23.5
MHz
VDRIVE above 4.75 V
17
MHz
VDRIVE above 3.3 V
14.5
MHz
VDRIVE above 2.7 V
11.5
MHz
VDRIVE above 2.3 V
t18
Delay from CS until DOUTA/DOUTB three-state disabled/delay from CS
until MSB valid
15
ns
VDRIVE above 4.75 V
20
ns
VDRIVE above 3.3 V
30
ns
VDRIVE = 2.3 V to 2.7 V
Data access time after SCLK rising edge
17
ns
VDRIVE above 4.75 V
23
ns
VDRIVE above 3.3 V
27
ns
VDRIVE above 2.7 V
34
ns
VDRIVE above 2.3 V
t20
0.4 tSCLK
ns
SCLK low pulse width
t21
0.4 tSCLK
ns
SCLK high pulse width
t22
7
SCLK rising edge to DOUTA/DOUTB valid hold time
t23
22
ns
CS rising edge to DOUTA/DOUTB three-state enabled
FRSTDATA OPERATION
t24
Delay from CS falling edge until FRSTDATA three-state disabled
15
ns
VDRIVE above 4.75 V
20
ns
VDRIVE above 3.3 V
25
ns
VDRIVE above 2.7 V
30
ns
VDRIVE above 2.3 V
t25
ns
Delay from CS falling edge until FRSTDATA high, serial mode
15
ns
VDRIVE above 4.75 V
20
ns
VDRIVE above 3.3 V
25
ns
VDRIVE above 2.7 V
30
ns
VDRIVE above 2.3 V
t26
Delay from RD falling edge to FRSTDATA high
16
ns
VDRIVE above 4.75 V
20
ns
VDRIVE above 3.3 V
25
ns
VDRIVE above 2.7 V
30
ns
VDRIVE above 2.3 V