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參數(shù)資料
型號: AD7190BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 39/41頁
文件大?。?/td> 0K
描述: IC ADC 2CH 24BIT W/PGA 24TSSOP
產(chǎn)品培訓模塊: Weigh Scale Introduction
設計資源: Precision Weigh Scale Design Using AD7190 with Internal PGA (CN0102)
特色產(chǎn)品: AD7190 Sigma-Delta Converter
標準包裝: 62
位數(shù): 24
采樣率(每秒): 4.8k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 24-TSSOP
包裝: 管件
輸入數(shù)目和類型: 2 個差分,雙極;4 個偽差分,雙極
產(chǎn)品目錄頁面: 777 (CN2011-ZH PDF)
AD7190
Data Sheet
Rev. C | Page 6 of 40
Parameter
AD7190B
Unit
Test Conditions/Comments1
POWER REQUIREMENTS8
Power Supply Voltage
AVDD AGND
4.75/5.25
V min/max
DVDD DGND
2.7/5.25
V min/max
Power Supply Currents
AIDD Current
1
mA max
0.85 mA typical, gain = 1, buffer off.
1.3
mA max
1.1 mA typical, gain = 1, buffer on.
B Grade
4.5
mA max
3.5 mA typical, gain = 8, buffer off.
4.75
mA max
4 mA typical, gain = 8, buffer on.
6.2
mA max
5 mA typical, gain = 16 to 128, buffer off.
6.75
mA max
5.5 mA typical, gain = 16 to 128, buffer on.
WB Grade
5
mA max
3.5 mA typical, gain = 8, buffer off.
5.3
mA max
4 mA typical, gain = 8, buffer on.
6.8
mA max
5 mA typical, gain = 16 to 128, buffer off.
7.4
mA max
5.5 mA typical, gain = 16 to 128, buffer on.
DIDD Current
0.4
mA max
0.35 mA typical, DVDD = 3 V.
0.6
mA max
0.5 mA typical, DVDD = 5 V.
1.5
mA typ
External crystal used.
IDD (Power-Down Mode)
B Grade
2
μA max
WB Grade
5
μA max
1 Temperature range: TMIN = 40°C, TMAX = +105°C.
2 Specification is not production tested but is supported by characterization data at initial product release.
3 FS = decimal equivalent of Bit FS9 to Bit FS0 in the mode register.
4 Following a system or internal zero-scale calibration, the offset error is in the order of the noise for the programmed gain and output data rate selected. A system full-
scale calibration reduces the gain error to the order of the noise for the programmed gain and output data rate.
5 The analog inputs are configured for differential mode.
6 Applies at the factory calibration conditions (AVDD = 5 V, gain = 1, TA = 25
°C).
7 REJ60 is a bit in the mode register. When the output data rate is set to 50 Hz, setting REJ60 to 1 places a notch at 60 Hz, allowing simultaneous 50 Hz/60 Hz rejection.
8 Digital inputs equal to DVDD or DGND.
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