參數資料
型號: AD7190BRUZ
廠商: Analog Devices Inc
文件頁數: 18/41頁
文件大?。?/td> 0K
描述: IC ADC 2CH 24BIT W/PGA 24TSSOP
產品培訓模塊: Weigh Scale Introduction
設計資源: Precision Weigh Scale Design Using AD7190 with Internal PGA (CN0102)
特色產品: AD7190 Sigma-Delta Converter
標準包裝: 62
位數: 24
采樣率(每秒): 4.8k
數據接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉換器數目: 1
電壓電源: 模擬和數字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 24-TSSOP
包裝: 管件
輸入數目和類型: 2 個差分,雙極;4 個偽差分,雙極
產品目錄頁面: 777 (CN2011-ZH PDF)
AD7190
Data Sheet
Rev. C | Page 24 of 40
Table 20. Channel Selection
Channel Enable Bits in the Configuration Register
Channel Enabled
Status Register
Bits CHD[2:0]
Calibration
Register Pair
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
Positive Input
AIN(+)
Negative Input
AIN()
1
AIN1
AIN2
000
0
1
AIN3
AIN4
001
1
Temperature sensor
010
None
1
AIN2
011
0
1
AIN1
AINCOM
100
0
1
AIN2
AINCOM
101
1
AIN3
AINCOM
110
2
1
AIN4
AINCOM
111
3
DATA REGISTER
(RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x000000)
The conversion result from the ADC is stored in this data
register. This is a read-only, 24-bit register. On completion of a
read operation from this register, the RDY pin/bit is set. When
the DAT_STA bit in the mode register is set to 1, the contents of
the status register are appended to each 24-bit conversion. This
is advisable when several analog input channels are enabled
because the three LSBs of the status register (CHD2 to CHD0)
identify the channel from which the conversion originated.
ID REGISTER
RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xX4
The identification number for the AD7190 is stored in the ID
register. This is a read-only register.
GPOCON REGISTER
(RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00)
The GPOCON register is an 8-bit register from which data can
be read or to which data can be written. This register is used to
enable the general-purpose digital outputs.
Table 21 outlines the bit designations for the GPOCON register.
GP0 through GP7 indicate the bit locations. GP denotes that the
bits are in the GPOCON register. GP7 denotes the first bit of
the data stream. The number in parentheses indicates the
power-on/reset default status of that bit.
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