參數(shù)資料
型號: AD7142ACPZ-1REEL
廠商: Analog Devices Inc
文件頁數(shù): 39/73頁
文件大?。?/td> 0K
描述: IC CAP-TO-DGTL CONV PROG 32LFCSP
標準包裝: 1
類型: 電容數(shù)字轉(zhuǎn)換器
分辨率(位): 16 b
采樣率(每秒): 250k
數(shù)據(jù)接口: 串行
電壓電源: 單電源
電源電壓: 2.6 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應商設(shè)備封裝: 32-LFCSP-VQ
包裝: 標準包裝
產(chǎn)品目錄頁面: 781 (CN2011-ZH PDF)
其它名稱: AD7142ACPZ-1REELDKR
AD7142
Rev. A | Page 43 of 72
Table 24. STAGE_LOW_INT_EN Register
Address
Data Bit
Default Value
Type
Name
Description
0x005
[0]
0
R/W
STAGE0_LOW_INT_EN
STAGE0 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE0 low threshold is exceeded
[1]
0
STAGE1_LOW_INT_EN
STAGE1 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE1 low threshold is exceeded
[2]
0
STAGE2_LOW_INT_EN
STAGE2 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE2 low threshold is exceeded
[3]
0
STAGE3_LOW_INT_EN
STAGE3 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE3 low threshold is exceeded
[4]
0
STAGE4_LOW_INT_EN
STAGE4 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE4 low threshold is exceeded
[5]
0
STAGE5_LOW_INT_EN
STAGE5 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE5 low threshold is exceeded
[6]
0
STAGE6_LOW_INT_EN
STAGE6 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE6 low threshold is exceeded
[7]
0
STAGE7_LOW_INT_EN
STAGE7 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE7 low threshold is exceeded
[8]
0
STAGE8_LOW_INT_EN
STAGE8 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE8 low threshold is exceeded
[9]
0
STAGE9_LOW_INT_EN
STAGE9 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE9 low threshold is exceeded
[10]
0
STAGE10_LOW_INT_EN
STAGE10 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE10 low threshold is exceeded
[11]
0
STAGE11_LOW_INT_EN
STAGE11 low interrupt enable
0 = interrupt source disabled
1 = INT asserted if STAGE11 low threshold is exceeded
[13:12]
0
GPIO_SETUP
GPIO setup
00 = disable GPIO pin
01 = configure GPIO as an input
10 = configure GPIO as an active low output
11 = configure GPIO as an active high output
[15:14]
0
GPIO_INPUT_CONFIG
GPIO input configuration
00 = triggered on negative level
01 = triggered on positive edge
10 = triggered on negative edge
11 = triggered on positive level
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