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參數(shù)資料
| 型號： | AD7010ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | MIL-spec connector accessory |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO24 |
| 封裝： | SSOP-24 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 249K |
| 代理商： | AD7010ARS |
AD7010
REV. B
–6–
T E RMINOLOGY
E rror Vector Magnitude
T his is a measure of the rms error vector introduced by the
AD7010 where signal error vector is defined as the rms devia-
tion of a transmitted symbol from its ideal position, as illustrated
in Figure 7, when filtered by an ideal RRC filter.
Gain Matching Between Channels
T his is the Gain matching between the I and Q outputs, mea-
sured when transmitting all zeros.
Offset Vector Magnitude
T his is a measure of the offset vector introduced by the AD7010
as illustrated in Figure 7. T he offset vector is calculated so as to
minimize the rms error vector for each of the constellation points.
Output Signal Range and Differential Output Range
T he output signal range is the output voltage swing and dc bias
level for each of the analog outputs. T he Differential Output
Range is the difference between IT x and
ITx
for the I channel
and the difference between QT x and
QTx
for the Q Channel.
JDC Spurious Power
T his is the rms sum of the spurious power measured at multi-
ples of 25 kHz, in a rectangular window of
±
10.5 kHz, relative
to twice the rms power in a RRC window in the 0 kHz to
10.5 kHz band.
Signal Vector Magnitude
T his is the radius of the IQ constellation diagram as illustrated
in Figure 7.
I
Q
ERROR VECTOR
OFFSET
VECTOR
0,0
SIGNAL VECTOR
Figure 7.
CIRCUIT DE SCRIPT ION
T RANSMIT SE CT ION
T he transmit section of the AD7010 generates
π
/4 DQPSK I
and Q waveforms in accordance with JDC specification. T his is
accomplished by a digital
π
/4 DQPSK modulator, which in-
cludes the Root-Raised Cosine filters (
α
= 0.5), followed by two
10-bit DACs and on-chip reconstruction filters. T he
π
/4
DQPSK (Differential Quadrature Phase Shift K eying) digital
modulator generates 10-bit I and Q data in response to the
transmit data stream. T he 10-bit I and Q DACs are filtered by
on-chip reconstruction filters, which also generate differential
analog outputs for both I and Q channels.
p
/4 DQPSK Modulator
T he
π
/4 DQPSK modulator generates 10-bit I and Q data (In-
phase and Quadrature) which are loaded into the I and Q 10-bit
transmit DACs.
T able II.
X
k
Y
k
Df
k
1
0
0
1
1
1
0
0
–3
π
/4
3
π
/4
π
/4
–
π
/4
Figure 8 shows the functional block diagram of the
π
/4 DQPSK
modulator. T he transmit serial data (T xDAT A) is first con-
verted into Di-bit symbols [X
k
, Y
k
], using a 2-bit serial to paral-
lel converter. T he data is then differentially encoded; symbols
are transmitted as changes in phase rather than absolute phases.
Each symbol represents a phase change, as illustrated in T able
II, and this along with the previously transmitted symbol deter-
mines the next symbol to be transmitted. T he differential phase
encoder generates I and Q impulses [I
k
, Q
k
] in response to the
Di-bit symbols according to:
I
k
= COS
[
φ
k
–1
+
φ
k
]
Q
k
= SIN
[
φ
k
–1
+
φ
k
]
DIFFERENTIAL
EPHASE
ROOT-RAISED
I DATA
Q DATA
10
10
SE2-BIT
CONVERTER
π
/4 DQPSK DIGITAL MODULATOR
X
k
Y
k
I
k
Q
k
ROOT-RAISED
COSINE FILTER
TxDATA
Figure 8.
π
/4 DQPSK Modulator Functional Block Diagram
Figure 9 illustrates the
π
/4 DQPSK constellation diagram as de-
scribed above, showing the eight possible states for [I
k
, Q
k
].
T he I
k
and Q
k
impulses are then filtered by FIR Root-Raised
Cosine Filters (
α
= 0.5), generating 10-bit I and Q data. T he
FIR Root-Raised Cosine Filters have an impulse response of
±
4 symbols.
I
Q
Figure 9.
π
/4 DQPSK Constellation Diagram
T ransmit Calibration
When the transmit section is brought out of sleep mode (Power
high), the transmit section initiates a self-calibration routine to
remove the offset between IT x and
ITx
and the offset between
QT x and
QTx
. READY goes high on the completion of the self-
calibration routine. Once READY goes high, BIN (Burst In)
can be brought high to initiate a transmit burst.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7010 | CMOS JDC DQPSK Baseband Transmit Port(CMOS 基帶傳輸口) |
| AD7011 | CMOS, ADC p/4 DQPSK Baseband Transmit Port |
| AD7011ARS | MB 4C 4#12 PIN RECP |
| AD7013ARS | CMOS TIA IS-54 Baseband Receive Port |
| AD7013 | CMOS TIA IS-54 Baseband Receive Port(CMOS 基帶接收口) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7011 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS, ADC p/4 DQPSK Baseband Transmit Port |
| AD7011ARS | 制造商:Analog Devices 功能描述:Quadrature Mod 24-Pin SSOP |
| AD7011ARS-REEL | 制造商:Analog Devices 功能描述:Quadrature Mod 24-Pin SSOP T/R 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD7013 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS TIA IS-54 Baseband Receive Port |
| AD7013ARS | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS TIA IS-54 Baseband Receive Port |
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