參數(shù)資料
型號： AD5379
廠商： Analog Devices, Inc.
英文描述： 40-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage-Output DAC
中文描述： 40通道，14位，并行和串行輸入，雙極性電壓輸出DAC
文件頁數(shù)： 14/28頁
文件大?。?/td> 393K
代理商： AD5379
AD5379
Pin
RESET
Rev. 0 | Page 14 of 28
Function
Asynchronous Digital Reset Input (falling edge sensitive). If unused, RESET may be left unconnected; an internal pull-
up resistor (1 M) ensures that the RESET input is held high. The function of this pin is equivalent to that of the
power-on reset generator. When this pin is taken low, the AD5379 state machine initiates a reset sequence to digitally
reset x1, m, c, and x2 registers to their default power-on values. This sequence takes 100 μs (typ). Furthermore, the
input to each of the DAC output buffer stages, VOUT0 to VOUT39, is switched to the externally set potential on the
relevant REFGND pin. During RESET, BUSY goes low and the parallel interface is disabled. All LDAC pulses are ignored
until BUSY goes high. When RESET is taken high again, the DAC ouputs remain at REFGND until LDAC is taken low.
Reference Ground for DACs 0 to 7. VOUT0 to VOUT7 are referenced to this voltage.
Reference Ground for DACs 8 and 9. VOUT8 and VOUT9 are referenced to this voltage.
Reference Ground for DACs 10 to 17. VOUT10 to VOUT17 are referenced to this voltage.
Reference Ground for DACs 18 and 19. VOUT18 and VOUT19 are referenced to this voltage.
Reference Ground for DACs 20 to 27. VOUT20 to VOUT27 are referenced to this voltage.
Reference Ground for DACs 28 and 29. VOUT28 and VOUT29 are referenced to this voltage.
Reference Ground for DACs 30 to 37. VOUT30 to VOUT37 are referenced to this voltage.
Reference Ground for DACs 38 and 39. VOUT38 and VOUT39 are referenced to this voltage.
REFGNDA1
REFGNDA2
REFGNDB1
REFGNDB2
REFGNDC1
REFGNDC2
REFGNDD1
REFGNDD2
1
These serial interface signals do not require separate pins, but share parallel interface pins.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD537JCHIPS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-to-Frequency Converter
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