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參數(shù)資料
| 型號(hào)： | A67P9336E-3.5 |
| 廠商： | AMIC Technology Corporation |
| 元件分類： | DRAM |
| 英文描述： | 1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM |
| 中文描述： | 100萬(wàn)X 18，為512k × 36 LVTTL，流水線ZeBL的SRAM |
| 文件頁(yè)數(shù)： | 16/18頁(yè) |
| 文件大?。?/td> | 249K |
| 代理商： | A67P9336E-3.5 |
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A67P0618/A67P9336 Series
PRELIMINARY (September, 2004, Version 0.0)
16
AMIC Technology, Corp.
NOP, STALL and Deselect Cycles
Note :
1. The IGNORE CLOCK EDGE or STALL cycle (clock 3) illustrates
CEN
being used to create a “pause.” A WRITE is
not performed during this cycle.
2. For this waveform, ZZ and
OE
are tied LOW.
3.
CE
represents three signals. When
CE
= 0, it represents
CE
= 0,
4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The
most recent data may be from the input data register.
2
CE
= 0, CE2 = 1.
A3
A2
A1
A4
A5
Q(A5)
D(A4)
Q(A3)
Q(A2)
D(A1)
WRITE
D(A1)
READ
Q(A2)
STALL
READ
Q(A3)
WRITE
D(A4)
STALL
NOP
READ
Q(A5)
DESELECT
CONTINUE
DESELECT
: Don't Care
: Undefined
1
2
3
4
5
t
KHQX
t
KHQZ
6
7
8
9
10
CLK
CEN
CE
ADV/
LD
R/W
BWx
ADDRESS
I/O
COMMAND
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A67P9336E-4.2 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM |
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| A6800 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:DABiC-5 Latched Sink Drivers |
| A6800SA-T | 功能描述:IC SINK DRIVER LATCHED 14-DIP RoHS:是 類別:集成電路 (IC) >> PMIC - MOSFET，電橋驅(qū)動(dòng)器 - 內(nèi)部開(kāi)關(guān) 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:高端/低端驅(qū)動(dòng)器 輸入類型:SPI 輸出數(shù):8 導(dǎo)通狀態(tài)電阻:850 毫歐，1.6 歐姆 電流 - 輸出 / 通道:205mA，410mA 電流 - 峰值輸出:500mA，1A 電源電壓:9 V ~ 16 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:PG-DSO-20-45 包裝:帶卷 (TR) |
| A6800SA-T | 制造商:Allegro MicroSystems 功能描述:Driver IC Number of Drivers:4 |
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