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參數(shù)資料
| 型號： | A67P9336E-3.2 |
| 廠商： | AMIC Technology Corporation |
| 元件分類： | DRAM |
| 英文描述： | 1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM |
| 中文描述： | 100萬X 18，為512k × 36 LVTTL，流水線ZeBL的SRAM |
| 文件頁數(shù)： | 7/18頁 |
| 文件大?。?/td> | 249K |
| 代理商： | A67P9336E-3.2 |
A67P0618/A67P9336 Series
PRELIMINARY (September, 2004, Version 0.0)
7
AMIC Technology, Corp.
Pin Description (continued)
Pin No.
Symbol
Description
LQFP (X18)
LQFP (X36)
64
64
ZZ
Snooze Enable : This active high asynchronous input causes
the device to enter a low-power standby mode in which all
data in the memory array is retained. When active, all other
inputs are ignored.
88
88
R/
W
Read/Write : This active input determines the cycle type
when ADV/
LD
is LOW. This is the only means for
determining READs and WRITEs. READ cycles may not be
converted into WRITEs (and vice versa) other than by
loading a new address. A LOW on this pin permits BYTE
WRITE operations and must meet the setup and hold times
around the rising edge of CLK. Full bus width WRITEs occur
if all byte write enables are LOW.
74, 73, 72, 69, 68,
63, 62, 59, 58,
24, 23, 22, 19, 18
13, 12, 9, 8
51, 52, 53, 56, 57,
58, 59, 62, 63
68, 69, 72, 73, 74,
75, 78, 79, 80
1, 2, 3, 6, 7, 8, 9,
12, 13,
18, 19, 22, 23, 24,
25, 28, 29, 30
I/Oa
I/Ob
I/Oc
I/Od
SRAM Data I/O : Byte “a” is I/Oa pins; Byte “b” is I/Ob pins;
Byte “c” is I/Oc pins; Byte “d” is I/Od pins. Input data must
meet setup and hold times around CLK rising edge.
31
31
MODE
Mode : This input selects the burst sequence. A LOW on this
pin selects linear burst. NC or HIGH on this pin selects
interleaved burst. Do not alter input state while device is
operating.
1, 2, 3, 6, 7, 25, 28,
29, 30, 38, 39,
42,43 51, 52, 53,
56, 57, 75, 78, 79,
95, 96
38,39,42,43
NC
No Connect : These pins can be left floating or connected to
GND to minimize thermal impedance.
15, 41, 65, 91
15, 41, 65, 91
VCC
Power Supply : See DC Electrical Characteristics and
Operating Conditions for range.
14, 16, 66
14, 16, 66
VCC
These pins do not have to be connected directly to VCC as
long as the input voltage is
≥
V
IH
. This input is not connected
to VCC bus internally.
4, 11, 20, 27,
54, 61, 70, 77
4, 11, 20, 27, 54,
61, 70, 77
VCCQ
Isolated Output Buffer Supply : See DC Electrical
Characteristics and Operating Conditions for range.
17, 40, 90
17, 40, 90
VSS
Ground : GND.
5,10,21,26,
55,60,71,76
5,10,21,26,
55,60,71,76
VSSQ
Isolated Output Buffer Ground
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A67P0618E-2.6 | CAT5E 350 MHZ PATCH CORD 5FT, WHITE, 25-PACK |
| A67P0618 | 1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM |
| A67P0618E | CONNECTOR ACCESSORY |
| A67P0618E-2.8 | CONNECTOR ACCESSORY |
| A67P0618E-3.2 | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A67P9336E-4.2 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 18, 512K X 36 LVTTL, Pipelined ZeBL SRAM |
| A67S | 制造商:M/A-COM Technology Solutions 功能描述:GAIN BLOCK |
| A6800 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:DABiC-5 Latched Sink Drivers |
| A6800SA-T | 功能描述:IC SINK DRIVER LATCHED 14-DIP RoHS:是 類別:集成電路 (IC) >> PMIC - MOSFET，電橋驅(qū)動器 - 內(nèi)部開關(guān) 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:高端/低端驅(qū)動器 輸入類型:SPI 輸出數(shù):8 導(dǎo)通狀態(tài)電阻:850 毫歐，1.6 歐姆 電流 - 輸出 / 通道:205mA，410mA 電流 - 峰值輸出:500mA，1A 電源電壓:9 V ~ 16 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:PG-DSO-20-45 包裝:帶卷 (TR) |
| A6800SA-T | 制造商:Allegro MicroSystems 功能描述:Driver IC Number of Drivers:4 |
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