參數(shù)資料
型號(hào)： A43E26161G-95U
廠商： AMIC Technology Corporation
英文描述： 1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
中文描述： 100萬(wàn)× 16位× 4個(gè)銀行低功耗同步DRAM
文件頁(yè)數(shù)： 33/44頁(yè)
文件大?。?/td> 1123K
代理商： A43E26161G-95U
A43E26161
(December, 2004, Version 1.0)
32
AMIC Technology, Corp.
Write Interrupted by Precharge Command & Write Burst Stop Cycle @ Burst Length = Full Page
High
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CLOCK
CKE
CS
RAS
CAS
ADDR
BS1
Row Active
(A-Bank)
: Don't care
RAa
A10/AP
CAa
WE
DQM
DAa4
DAa3
DAa1
DAa2
DAb0
DAb1
DAb2
DAb3
DQ
Precharge
(A-Bank)
Write
(A-Bank)
CAb
Write
(A-Bank)
Burst Stop
DAa0
DAb4
DAb5
t
RDL
t
BDL
* Note 2
BS0
RAa
* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.
2. Data-in at the cycle of interrupted by precharge cannot be written into the corresponding memory cell.
It is defined by AC parameter of t
RDL
(=2CLK).
DQM at write interrupted by precharge command is needed to prevent invalid write.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
Input data after Row precharge cycle will be masked internally.
3. Burst stop is valid at every burst length.
相關(guān)PDF資料
PDF描述
A43E26161G-95UF 1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95 1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95F 1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
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A43L0616A 512K X 16 Bit X 2 Banks Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A43E26161G-95UF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95F 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95U 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
A43E26161V-95UF 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM
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