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參數(shù)資料
| 型號： | A43E06321G-75UF |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 512K X 32 Bit X 2 Banks Low Power Synchronous DRAM |
| 中文描述： | 為512k × 32位× 2銀行低功耗同步DRAM |
| 文件頁數(shù)： | 5/46頁 |
| 文件大?。?/td> | 1351K |
| 代理商： | A43E06321G-75UF |
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A43E06321
PRELIMINARY
(July, 2005, Version 0.0)
4
AMIC Technology, Corp.
Absolute Maximum Ratings*
Voltage on any pin relative to VSS (Vin, Vout ) . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +2.6V
Voltage on VDD supply relative to VSS (VDD, VDDQ )
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-1.0V to + 2.6V
Storage Temperature (T
STG
) . . . . . . . . . . -55
°
C to +150
°
C
Soldering Temperature X Time (T
SLODER
) . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
°
C X 10sec
Power Dissipation (P
D
) . . . . . . . . . . . . . . . . . . . . . . . . 0.8W
Short Circuit Current (Ios) . . . . . . . . . . . . . . . . . . . . 50mA
*Comments
Permanent device damage may occur if “Absolute
Maximum Ratings” are exceeded.
Functional operation should be restricted to recommended
operating condition.
Exposure to higher than recommended voltage for
extended periods of time could affect device reliability.
Capacitance (T
A
=25
°
C, f=1MHz)
Parameter
Symbol
Condition
Min
Max
Unit
Input Capacitance
CI1
A0 to A10, BA
2.0
4.0
pF
CI2
CLK, CKE,
CS
,
RAS
,
CAS
,
WE
, DQM
2.0
4.0
pF
Data Input/Output Capacitance
CI/O
DQ
0
to DQ
31
3.5
6.0
pF
DC Electrical Characteristics
Recommend operating conditions
(Voltage referenced to VSS=0V, T
A
= 0oC to +70oC for commercial or T
A
=-40oC to +85oC for extended)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply Voltage
VDD
1.7
1.8
1.95
V
DQ Supply Voltage
VDDQ
1.7
1.8
1.95
V
Input High Voltage
V
IH
0.8*VDDQ
-
VDDQ+0.3
V
Input Low Voltage
V
IL
-0.3
-
0.3
V
Note 1
Output High Voltage
V
OH
VDDQ - 0.2
-
-
V
I
OH
= -0.1mA
Output Low Voltage
V
OL
-
-
0.2
V
I
OL
= 0.1mA
Input Leakage Current
I
IL
-1
-
1
μ
A
Note 2
Output Leakage Current
I
OL
-1.5
-
1.5
μ
A
Note 3
Output Loading Condition
See Fig. 1 (Page 6)
Note:
1. V
IL
(min) = -1.5V AC (pulse width
≤
5ns).
2. Any input 0V
≤
VIN
≤
VDD + 0.3V, all other pins are not under test = 0V
3. Dout is disabled, 0V
≤
Vout
≤
VDD
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