參數(shù)資料
型號(hào)： A1354KKT-T
廠商： Allegro Microsystems Inc
文件頁(yè)數(shù)： 10/23頁(yè)
文件大?。?/td> 540K
描述： IC SENSOR HALL EFFECT 4-SIP
產(chǎn)品培訓(xùn)模塊： Current Sensor
標(biāo)準(zhǔn)包裝： 500
傳感范圍： 0.1% ~ 0.2%/G
類型： 線性場(chǎng)傳感器
電源電壓： 4.5 V ~ 16 V
電流 - 電源： 9mA
輸出類型： 數(shù)字式， PWM 編碼
特點(diǎn)： 高精度
工作溫度： -40°C ~ 125°C
封裝/外殼： 4-SIP
供應(yīng)商設(shè)備封裝： 4-SIP
包裝： 散裝
產(chǎn)品目錄頁(yè)面： 1139 (CN2011-ZH PDF)
其它名稱： 620-1317
Quiescent Voltage Output and Duty Cycle The operating 
output voltage, V
OUT
 , is determined by the PWM output voltage
duty cycle, D. In turn, D is proportional to a change in air gap
between the A1354 Hall element and the magnetic target. The
output duty cycle in the quiescent state (no significant magnetic
field: B = 0 G), D
(Q)
, remains steady at the specific programmed
duty cycle throughout the entire operating ranges of V
CC
 and
ambient temperature, T
A
.
Power-On Time When the supply is ramped to its operating 
voltage, the device requires a finite time to power its internal
components before supplying a valid PWM output duty cycle.
Power-On Time, t
PO
 , is defined as the time it takes, with no
applied magnetic field (quiescent state), for the PWM output
voltage duty cycle, D
(Q)
 , to settle within ?% of its steady state
value, after the power supply has reached its minimum specified
operating voltage, V
CC
(min).
Response Time The time interval, t
RESPONSE
 , between a) when
the applied magnetic field reaches 90% of its final value, and b)
when the device reaches 90% of its output level corresponding to
the applied magnetic field. t
RESPONSE
 depends on the signal delay
defined by the device filter bandwidth, BW
i
 , and a full PWM
period, which is required for output update.
Guaranteed Quiescent Duty Cycle Output Range The 
quiescent duty cycle output, D
(Q)
, can be programmed within
the guaranteed quiescent duty cycle range limits: D
(Q)
(min) and
D
(Q)
(max). The available guaranteed programming range for D
(Q)
 
falls within the distributions of the initial duty cycle, D
(Q)init
, and
of the maximum programming code for setting D
(Q)
 , as shown in
figure 1.
Average Quiescent Duty Cycle Output Step Size The 
average quiescent duty cycle output step size, Step
D(Q)
 , for a
single device is determined using the following calculation:
 
D
(Q)maxcode
 D
(Q)mincode
2
n
1
Step
D(Q)
=
,
 
(1)
where:
n is the number of available programming bits in the trim range,
2
n
1 is the value of the maximum programming code in the
range, and
D
(Q)maxcode
 is the quiescent output duty cycle at code 2
n
1.
Quiescent Duty Cycle Output Programming Resolution 
The programming resolution for any device is half of its pro-
gramming step size. Therefore, the typical programming resolu-
tion is:
 
Err
PGD(Q)
(typ)
= 0.5 ?/SPAN> Step
D(Q)
(typ)
.
 
(2)
Quiescent Output Duty Cycle Drift Through Tempera-
ture Range Due to internal component tolerances and thermal 
considerations, the quiescent duty cycle temperature coefficient,
TC
D(Q)
, may drift from its nominal value over the range of the
operating ambient temperature, T
A
. For purposes of specification,
the Quiescent Duty Cycle Output Drift Through Temperature
Range, D
(Q)
 (%), is defined as:
 
D
(Q)(TA)
 D
(Q)(25癈)
D
(Q)
=
.
 
(3)
D
(Q)
should be calculated using the actual measured values of
D
(Q)(擳A)
and D
(Q)(25癈)
rather than ideal programming target
values.
Sensitivity The presence of a south polarity magnetic field, 
perpendicular to the branded face of the package, increases the
output duty cycle from its quiescent value toward the maximum
duty cycle limit. The amount of the output duty cycle increase
is proportional to the magnitude of the magnetic field applied.
Conversely, the application of a north polarity field decreases the
output duty cycle from its quiescent value. This proportionality is
specified as the magnetic sensitivity, Sens (%/G), of the device,
and it is defined for bipolar devices as:
 
D
(BPOS)
 D
(BNEG)
BPOS  BNEG
Sens =
,
 
(4)
Characteristic Definitions
Guaranteed D
(Q)
 
Programming
Range
D
(Q)
(min)
D
(Q)
(max)
Max Code D
(Q)
 
Distribution
Min Code D
(Q)
 
Distribution
Initial D
(Q)
Distribution
Figure 1. Quiescent output duty cycle versus time
High Precision 2-Wire Linear Hall Effect Sensor IC
with Pulse Width Modulated Output
A1354
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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參數(shù)描述
A1354KKTTN-T 功能描述:IC HALL EFFECT SENSOR 2WIRE 4SIP RoHS:是 類別:傳感器，轉(zhuǎn)換器 >> 磁性 - 霍爾效應(yīng)，數(shù)字式開關(guān)，線性，羅盤 (IC) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感范圍:20mT ~ 80mT 類型:旋轉(zhuǎn) 電源電壓:4.5 V ~ 5.5 V 電流 - 電源:15mA 電流 - 輸出（最大）:- 輸出類型:數(shù)字式，PWM，8.5 位串行 特點(diǎn):可編程 工作溫度:-40°C ~ 150°C 封裝/外殼:20-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:20-SSOP 包裝:Digi-Reel® 其它名稱:AS5132-HSST-500DKR
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A1354P2-4 制造商:APEM 功能描述:
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