參數(shù)資料
型號(hào)： 9UMS9633BKILFT
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘產(chǎn)生/分配
英文描述： 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC48
封裝： ROHS COMPLIANT, PLASTIC, MLF-48
文件頁(yè)數(shù)： 6/22頁(yè)
文件大小： 209K
代理商： 9UMS9633BKILFT
IDTTM/ICSTM Ultra Mobile PC Clock for Industrial Temperature Range
1451—01/20/09
ICS9UMS9633BI
ULTRA MOBILE PC CLOCK FOR INDUSTRIAL TEMPERATURE RANGE
14
Advance Information
Byte
2
Output Enable Register
Bit(s)
Pin #
Name
Description
Type
0
1
Default
7
CPU0 Enable
This bit controls whether the CPU[0] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
6
CPU1 Enable
This bit controls whether the CPU[1] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
5
CPU2 Enable
This bit controls whether the CPU[2] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
4
SRC0 Enable
This bit controls whether the SRC[0] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
3
SRC1 Enable
This bit controls whether the SRC[1] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
2
SRC2 Enable
This bit controls whether the SRC[2] output buffer
is enabled or not.
RW
0 = Disabled
1 = Enabled
1
DOT Enable
This bit controls whether the DOT output buffer is
enabled or not.
RW
0 = Disabled
1 = Enabled
1
0
LCD100 Enable
This bit controls whether the LCD output buffer is
enabled or not.
RW
0 = Disabled
1 = Enabled
1
Byte
3
Output Control Register
Bit(s)
Pin #
Name
Description
Type
0
1
Default
7
0
6
0
5
REF Enable
This bit controls whether the REF output buffer is
enabled or not.
RW
0 = Disabled
1 = Enabled
1
4
3
2
CPU0 Stop Enable
This bit controls whether the CPU[0] output buffer
is free-running or stoppable. If it is set to stoppable
the CPU[0] output buffer will be disabled with the
assertion of CPU_STP#.
RW
Free Running
Stoppable
0
1
CPU1 Stop Enable
This bit controls whether the CPU[1] output buffer
is free-running or stoppable. If it is set to stoppable
the CPU[1] output buffer will be disabled with the
assertion of CPU_STP#.
RW
Free Running
Stoppable
0
CPU2 Stop Enable
This bit controls whether the CPU[2] output buffer
is free-running or stoppable. If it is set to stoppable
the CPU[2] output buffer will be disabled with the
assertion of CPU_STP#.
RW
Free Running
Stoppable
0
10
REF Slew
00 = Slow Edge Rate
01 = Medium Edge Rate
10 = Fast Edge Rate
11 = Reserved
RW
These bits control the edge rate of the REF clock.
Reserved
相關(guān)PDF資料
PDF描述
9UMS9633BFLFT OTHER CLOCK GENERATOR, PDSO48
9ZX21501CKLFT 9ZX SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
9ZX21501CKLF 9ZX SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
E01-521-FREQ CRYSTAL OSCILLATOR, CLOCK, 10 MHz - 400 MHz, ECL 100K OUTPUT
E13C7D2F-312.500MTR CRYSTAL OSCILLATOR, CLOCK, 312.5 MHz, LVPECL OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9UMS9633BKLF 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
9UMS9633BKLFT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
9US99/25917 制造商:MCM 功能描述:CHEMICAL SPILL KIT LAB SAFETY 制造商:Distributed By MCM 功能描述:Lab Safety Chemical Spill Kit
9US99/8UKR2 制造商:MCM 功能描述:CHEMICAL SPILL KIT LAB SAFETY
9UWE0300000 制造商:LG Corporation 功能描述:SOLDER,SOLDERING
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*