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參數(shù)資料
| 型號： | 9LRS3187BKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 133.33 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC32 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-32 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 193K |
| 代理商： | 9LRS3187BKLFT |
IDT Programmable Timing Control Hub for Intel Based Systems
1602E—04/29/11
ICS9LRS3187B
Programmable Timing Control Hub for Intel Based Systems
11
Datasheet
AC Electrical Characteristics - Low Power Differential Outputs, Commercial Temperature Range
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS Notes
Rising Edge Slew Rate
tSLR
Averaging on
2.5
3.7
4
V/ns
2, 3
Falling Edge Slew Rate
tFLR
Averaging on
2.5
3.7
4
V/ns
2, 3
Slew Rate Variation
tSLVAR
Averaging on
3.6
20
%
1, 6
Differential Voltage Swing
VSWING
Averaging off
300
mV
2
Crossing Point Voltage
VXABS
Averaging off
300
446
550
mV
1,4,5
Crossing Point Variation
VXABSVAR
Averaging off
70
140
mV
1,4,9
Maximum Output Voltage
VHIGH
Averaging off
1150
mV
1,7
Minimum Output Voltage
VLOW
Averaging off
-300
mV
1,8
Duty Cycle
DCYC
Averaging on
45
49.8
55
%
2
CPU Skew
CPUSKEW
Averaging on
35
100
ps
SRC Skew
tSKEWSRC
Averaging on, SRC to SATA skew when Byte0, bit 1 = 0
259
350
ps
1Measurement taken for single ended waveform on a component test board (not in system)
2 Measurement taken from differential waveform on a component test board. (not in system)
3 Slew rate emastured through V_swing voltage range centered about differential zero
4 Vcross is defined at the voltage where Clock = Clock#, measured on a component test board (not in system)
5 Only applies to the differential rising edge (Clock rising, Clock# falling)
7 The max voltage including overshoot.
8 The min voltage including undershoot.
9 The total variation of all Vcross measurements in any particular system. Note this is a subset of V_cross min/mas (V_Cross absolute) allowed. The intent is to limit
Vcross induced modulation by setting C_cross_delta to be smaller than V_Cross absolute
6 Matching applies to rising edge rate for Clock and falling edge rate for Clock#. It is measured using a +/-75mV window centered on the average cross point where Clock
rising meets Clock# falling. The median cross point is used to calculate the voltage
NOTES: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production). CL = 2pF, Rs = 0 ohms.
Clock Jitter Specs - Low Power Differential Outputs, Commercial Temperature Range
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS Notes
CPU Jitter - Cycle to Cycle
CPUJC2C
Differential Measurement
50
85
ps
1
SRC/SATA Jitter - Cycle to Cycle
SRCJC2C
Differential Measurement
50
125
ps
1,2
DOT Jitter - Cycle to Cycle
DOTJC2C
Differential Measurement
50
250
ps
1
tjphasePLL
PCIe Gen 1
35
86
ps (p-
p)
1,2,3
tjphaseLo
PCIe Gen 2
10kHz < f < 1.5MHz
1.8
3
ps
(RMS)
1,2,3
tjphaseHigh
PCIe Gen 2
1.5MHz < f < Nyquist (50MHz)
2.3
3.1
ps
(RMS)
1,2,3
NOTES: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production). CL = 2pF, Rs = 0 ohms.
1JItter specs are specified as measured on a clock characterization board. System designers need to take special care not to use these numbers, as the in-system
performance will be somewhat degraded. The receiver EMTS (chispet or CPU) will have the receiver jitter specs as measured in a real system.
2 Phase jitter requirement: The designated Gen2 outputs will meet the reference clock jitter requirements from the PCI Express Gen2 Base Spec. The test is performed
on a component test board under quiet conditions with all outputs on.
SRC Phase Jitter
3See http://www.pcisig.com for complete specs
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參數(shù)描述 |
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| 9LRS3197AKLF | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 9LRS3197AKLFT | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LRS4103AKLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 9LRS4103BKLF | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 9LRS4103BKLFT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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