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參數(shù)資料
| 型號： | 9EX21801AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 160K |
| 代理商： | 9EX21801AKLFT |
IDTTM
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
1463B — 01/20/10
ICS9EX21801A
18 Output PCIe G2/QPI Differential Buffer with 2:1 input mux
5
Datasheet
Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS Notes
3.3V Core Supply
Voltage
VDD_A
GND - 0.5
VDD + 0.5
V
1
3.3V Logic Supply
Voltage
VDD
GND - 0.5
VDD + 0.5
V
1
Storage Temperature
Ts
-65
150
°C
1
Ambient Operating Temp
Tambient
0
70
°C
1
Case Temperature
Tcase
115
°C
1
Input ESD protection
ESD prot
Human Body Model
2000
V
1
Electrical Characteristics - Input/Supply/Common Output Parameters
TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage
VIH
3.3 V +/-5%
2
VDD + 0.3
V
Input Low Voltage
VIL
3.3 V +/-5%
GND - 0.3
0.8
V
Input High Current
IIH
VIN = VDD
-5
5
uA
IIL1
VIN = 0 V; Inputs with no pull-up
resistors
-5
uA
IIL2
VIN = 0 V; Inputs with pull-up resistors
-200
uA
Digital Supply Current
IDD3.3D
Full Active, CL = Full load;
450
mA
1
Analog Supply Current
IDD3.3A
Full Active, CL = Full load;
40
mA
1
Digital Powerdown
Current
IDD3.3DPD
all differential pairs tri-stated
15
mA
1
Analog Powerdown
Current
IDD3.3APD
all differential pairs tri-stated
20
mA
1
FiPLL
PLL Mode
80
150
MHz
1
FiBYPASS
Bypass Mode
33
400
MHz
1
Pin Inductance
Lpin
7nH
1
CIN
Logic Inputs
1.5
5
pF
1
COUT
Output pin capacitance
6
pF
1
Clk Stabilization
TSTAB
From VDD Power-Up and after input
clock stabilization or de-assertion of
PD# to 1st clock
1ms
1
Allowable Spread
Modulation Frequency
fMOD
Triangular Modulation
30
33
kHz
1,3
OE# Latency
tLATOE#
DIF start after OE# assertion
DIF stop after OE# deassertion
4
12
cycles
1,2
Tdrive_PD
tDRVPD
DIF output enable after
PD de-assertion
300
us
1,2
Tfall
tF
Fall time of OE#
5
ns
1
Trise
tR
Rise time of OE#
5
ns
1Guaranteed by design and characterization, not 100% tested in production.
2Time from deassertion until outputs are >200 mV
Capacitance
Input Low Current
Input Frequency
3For which spread spectrum tracking error spec will be met.
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參數(shù)描述 |
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| 9EX21831AKLF | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
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