參數(shù)資料
型號: 95V2F857AHLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56
封裝: LEAD FREE, MO-205, MO-225, BGA-56
文件頁數(shù): 4/13頁
文件大?。?/td> 146K
代理商: 95V2F857AHLFT
12
ICS95V2F857A
1065A—0 2/03/05
Ordering Information
Designation for tape and reel packaging
Lead Free (Optional)
Package Type
K = MLF
Revision Designator (Ex. A, B, C, etc. Please check with salesperson for latest revision)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS, AV = Standard Device
ICS XXXX y K - (LF) - T
40-Pin MLF
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b
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5
8
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9
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0
1
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0
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01
0
.
05
0
.
0
2
A-
5
6
.
00
8
.
0
3
AF
E
R
0
2
.
0
DC
S
B
0
.
6
1
DC
S
B
5
7
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5
EC
S
B
0
.
6
1
EC
S
B
5
7
.
5
Q2
1
P4
2
.
02
4
.
00
6
.
0
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07
1
.
03
2
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0
D
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3
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20
9
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25
0
.
3
2
E5
7
.
20
9
.
25
0
.
3
Example:
ICS95V2F857AK(LF)T
相關(guān)PDF資料
PDF描述
95V842AFILF-T 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842YFLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842YFILF 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842AFLF 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
95V842AFLF-T 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
95V2F857AKLF 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK DRVR SGL 45MHZ TO 233MHZ 40PIN VFQFPN - Trays 制造商:Integrated Device Technology Inc 功能描述:IDT 95V2F857AKLF PLL
95V2F857AKLFT 制造商:Integrated Device Technology Inc 功能描述:40 VFQFPN (GREEN) - Tape and Reel
95V842AFILF 制造商:Integrated Device Technology Inc 功能描述:16 QSOP (GREEN) - Bulk
95V842AFILFT 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK DRVR SGL 33MHZ TO 333MHZ 16QSOP - Tape and Reel
95V842AFLF 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel