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參數(shù)資料
| 型號： | 95V2F857AHLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA56 |
| 封裝： | LEAD FREE, MO-205, MO-225, BGA-56 |
| 文件頁數(shù)： | 13/13頁 |
| 文件大?。?/td> | 146K |
| 代理商： | 95V2F857AHLFT |
9
ICS95V2F857A
1065A—02/03/05
Clock Inputs
and Outputs
80%
20%
80%
20%
Rise tsl
Fall tsl
VID,VOD
Figure 8. Input and Output Slew Rates
Parameter Measurement Information
t(hper_n)
t(hper_n+1)
1
fo
Y , FB_OUTC
X
Y , FB_OUTT
X
Figure 7. Half-Period Jitter
t
=-
(jit_Hper)
t
(jit_Hper_n)
1
2xfO
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| 95V842AFILF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842YFLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842YFILF | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842AFLF | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842AFLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| 95V2F857AKLF | 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK DRVR SGL 45MHZ TO 233MHZ 40PIN VFQFPN - Trays 制造商:Integrated Device Technology Inc 功能描述:IDT 95V2F857AKLF PLL |
| 95V2F857AKLFT | 制造商:Integrated Device Technology Inc 功能描述:40 VFQFPN (GREEN) - Tape and Reel |
| 95V842AFILF | 制造商:Integrated Device Technology Inc 功能描述:16 QSOP (GREEN) - Bulk |
| 95V842AFILFT | 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK DRVR SGL 33MHZ TO 333MHZ 16QSOP - Tape and Reel |
| 95V842AFLF | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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