參數(shù)資料
型號(hào): 951200201
廠商: ATMEL CORP
元件分類: 數(shù)字信號(hào)處理外設(shè)
英文描述: 40-BIT, DSP-FLOATING POINT PROCESSOR, QFP256
封裝: MQFP-256
文件頁(yè)數(shù): 36/50頁(yè)
文件大?。?/td> 702K
代理商: 951200201
41
TSC21020F
4153H–AERO–04/07
Figure 14. Equivalent Device Loading for AC Measurements (Includes all Fixtures)
Example System Hold
Time Calculation
To determine the data output hold time in a particular system, first calculate tDECAY using
the above equation. Choose V to be the difference between the TSC21020F's output
voltage and the input threshold for the device requiring the hold time. A typical V will be
0.4V. CL is the total bus capacitance (per data line), and IL is the total leakage or three-
state current (per data line). The hold time will be tDECAY plus the minimum disable time
(i.e. tHDWD for the write cycle).
Figure 15. Voltage Reference Levels for AC Measurements (Except Output
Enable/Disable)
Capacitive Loading
Output delays are based on standard capacitive loads: 100 pF on address, select, page
and strobe pins, and 50 pF on all others (see Figure 14). For different loads, these tim-
ing parameters should be derated. See the Hardware Configuration chapter of the
ADSP-21020 User's Manual from Analog Devices for further information on derating of
timing specifications.
Figures 16 and 17 show how the output rise time varies with capacitance. Figures 18
and 19 show how output delays vary with capacitance. Note that the graphs may not be
linear outside the ranges shown.
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