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參數(shù)資料
| 型號： | 951200201 |
| 廠商： | ATMEL CORP |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 40-BIT, DSP-FLOATING POINT PROCESSOR, QFP256 |
| 封裝： | MQFP-256 |
| 文件頁數(shù)： | 35/50頁 |
| 文件大?。?/td> | 702K |
| 代理商： | 951200201 |
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40
TSC21020F
4153H–AERO–04/07
Figure 13. Output Enable/Disable
Test Conditions
Output Disable Time
Output pins are considered to be disable when they stop driving, go into a high-imped-
ance state, and start to decay from their output high or low voltage. The time for the
voltage on the bus to decay by V is dependent on the capacitive load, CL, and the load
current, IL. It can be approximated by the following equation:
The output disable time (tDIS) is the difference between tMEASURED and tDECAY as shown
in Figure 13. The time tMEASURED is the interval from when the reference signal switches
to when the output voltage decays V from the measured output high or output low volt-
age. tDECAY is calculated with V equal to 0.5V, and test loads CL and IL.
Output Enable Time
Output pins are considered to be enabled when they have made a transition from a
high-impedance state to when they start driving. The output enable time (tENA) is the
interval from when a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown in the Output Enable
/Disable diagram. If multiple pins (such as the data bus) are enabled, the measurement
value is that of the first pin to start driving.
t
D E C A Y
C
L
V
I
L
--------------
=
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