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參數(shù)資料
| 型號： | 935268625551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數(shù)： | 8/82頁 |
| 文件大?。?/td> | 1965K |
| 代理商： | 935268625551 |
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Philips Semiconductors
ISP1581
Hi-Speed USB interface device
Product data
Rev. 05 — 26 February 2003
16 of 78
9397 750 10766
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
DMA registers
DMA Command
DMA controller
30
controls all DMA transfers
1
DMA Transfer Counter
DMA controller
34
sets byte count for DMA Transfer
4
DMA Conguration
DMA controller
38 (byte 0)
sets GDMA conguration (counter enable,
burst length, data strobing, bus width)
1
39 (byte 1)
sets ATA conguration (IORDY enable,
mode selection: ATA/UDMA/MDMA/PIO)
1
DMA Hardware
DMA controller
3C
endian type, master/slave selection, signal
polarity for DACK, DREQ, DIOW, DIOR
1
1F0 Task File
ATAPI peripheral
40
single address word register: byte 0 (lower
byte) is accessed rst
2
1F1Task File
ATAPI peripheral
48
IDE device access
1
1F2 Task File
ATAPI peripheral
49
IDE device access
1
1F3 Task File
ATAPI peripheral
4A
IDE device access
1
1F4 Task File
ATAPI peripheral
4B
IDE device access
1
1F5 Task File
ATAPI peripheral
4C
IDE device access
1
1F6 Task File
ATAPI peripheral
4D
IDE device access
1
1F7 Task File
ATAPI peripheral
44
IDE device access (write only; reading
returns FFH)
1
3F6 Task File
ATAPI peripheral
4E
IDE device access
1
3F7 Task File
ATAPI peripheral
4F
IDE device access
1
DMA Interrupt Reason
DMA controller
50 (byte 0)
shows reason (source) for DMA interrupt
1
51 (byte 1)
1
DMA Interrupt Enable
DMA controller
54 (byte 0)
enables DMA interrupt sources
1
55 (byte 1)
1
DMA Endpoint
DMA controller
58
selects endpoint FIFO, data ow direction
1
DMA Strobe Timing
DMA controller
60
strobe duration in UDMA/MDMA mode
1
General registers
Interrupt
device
18
shows interrupt sources
4
Chip ID
device
70
product ID code and hardware version
3
Frame Number
device
74
last successfully received Start Of Frame:
lower byte (byte 0) is accessed rst
2
Scratch
device
78
allows save/restore of rmware status
during ‘suspend’
2
Test Mode
PHY
84
direct setting of D
+, D states, loop back
mode, internal transceiver test (PHY)
1
Table 4:
Register summary…continued
Name
Destination
Address
(Hex)
Description
Size
(bytes)
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