參數(shù)資料
型號: 935266671518
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-486-1, LQFP-144
文件頁數(shù): 63/83頁
文件大?。?/td> 316K
代理商: 935266671518
Philips Semiconductors
Preliminary specification
PDI1394L41
1394 content protection AV link layer controller
2000 Dec 01
63
13.3.3
Asynchronous Transmit Request Next (TX_RQ_NEXT) – Base Address: 0x088
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TX_RQ_NEXT
SV00293
31 30
Bit 31..0:
W
TX_RQ_NEXT: First/middle quadlet of packet for transmitter request queue (write only).
Writing this register will clear the TREQQWR flag until the quadlet has been written to its queue.
13.3.4
Asynchronous Transmit Request Last (TX_RQ_LAST) – Base Address: 0x08C
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TX_RQ_LAST
SV00294
3130
Bit 31..0:
W
TX_RQ_LAST: Last quadlet of packet for transmitter request queue (write only).
Writing this register will clear the TREQQWR flag until the quadlet has been written to its queue.
13.3.5
Asynchronous Transmit Response Next (TX_RP_NEXT) – Base Address: 0x090
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TX_RP_NEXT
SV00295
31 30
Bit 31..0:
W
TX_RP_NEXT: First/middle quadlet of packet for transmitter response queue (write only).
Writing this register will clear the TRSPQWR flag until the quadlet has been written to its queue.
13.3.6
Asynchronous Transmit Response Last (TX_RP_LAST) – Base Address: 0x094
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TX_RP_LAST
SV00296
3130
Bit 31..0:
W
TX_RP_LAST: Last quadlet of packet for transmitter response queue (write only).
Writing this register will clear the TRSPQWR flag until the quadlet has been written to its queue.
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