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參數(shù)資料
| 型號： | 9240LP |
| 廠商： | Maxwell Technologies, Inc |
| 英文描述： | 14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC |
| 中文描述： | 14位，10 MSPS的單片機(jī)的A / D轉(zhuǎn)換器與并口的ASIC |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 495K |
| 代理商： | 9240LP |
M
4
01.10.05 REV 6
All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
14-Bit, 10 MSPS Monolithic A/D Converter with LPT ASIC
9240LP
T
ABLE
3. 9240LP DC S
PECIFICATIONS
(AVDD = 5V, DVDD = 5V, DRVDD = 5V, R
BIAS
= 2
K
, V
REF
= 2.5V,
V
IN
A=V
IN
B = ±2.5V D
IFFERENTIAL
I
NPUT
C
ENTERED
ON
V
REF
(1.25V
TO
3.75V A
BSOLUTE
)
T
A
= -55
TO
+125°C,
UNLESS
OTHERWISE
SPECIFIED
)
S
UBGROUPS
M
IN
P
ARAMETER
T
YP1
M
AX
U
NIT
RESOLUTION
MAX CONVERSION RATE
MAX REFERRED NOISE
1
V
REF
= 1 V
V
REF
= 2.5V
ACCURACY
2
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
INL
3
DNL
3
No Mssing Codes
Zero Error (@ 25 °C)
Gain Error (@ 25 °C)
1,4
Gain Error (@ 25 °C)
5
TEMPERATURE DRIFT
Zero Error
Gain Error
4
Gain Error
5
POWER SUPPLY REJECTION
ANALOG INPUT
1
Input Span (with V
REF
= 1.0 V)
(with V
REF
= 2.5 V)
Input (V
IN
A
OR
V
IN
B) Range
Input Capacitance
INTERNAL VOLTAGE REFERENCE
1
Output Voltage (1V mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2.5 V Mode)
Output Voltage Tolerance (2.5 V Mode)
Load Regulation V
REF
Load Regulation LPTV
REF6,7
REFERENCE INPUT RESISTANCE
1
14
10
--
--
--
--
Bits mn
MHz mn
9, 10, 11
--
--
0.9
0.36
--
--
LSB rms
1, 2, 3
1, 2, 3
1
1
1
-3
-1
--
--
--
--
--
--
±2.5
±0.6
±2.5
±0.7
--
--
--
--
3
1.0
--
14
0.3
1.5
0.75
LSB
LSB
LSB
LSB
Bits Guaranteed
% FSR
% FSR
% FSR
1, 2, 3
--
--
--
--
3.0
20.0
5.0
--
--
--
--
0.1
ppm/°C
ppm/°C
ppm/°C
% FSR
1, 2, 3
1, 2, 3
2
--
0
--
--
--
--
16
--
5
AVDD -.25
--
V p-p
V p-p
V
pF
--
--
--
--
--
--
--
1
--
2.5
--
10
--
5
--
±14
--
±35
--
10.0
--
V
mV
V
mV
mV
mV
k
1, 2, 3
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