參數(shù)資料
型號: 8535AG-21LFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 8535 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO14
封裝: 4.40 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-14
文件頁數(shù): 2/15頁
文件大小: 835K
代理商: 8535AG-21LFT
ICS8535-21
LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
IDT / ICS 3.3V LVPECL FANOUT BUFFER
10
ICS8535AG-21 REV. A FEBRUARY 24, 2009
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS535-21.
Equations and example calculations are also provided.
1.
Power Dissipation.
The total power dissipation for the ICS8535-21 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 50mA = 173.25mW
Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 2 * 30mW = 60mW
Total Power_MAX (3.3V, with all outputs switching) = 173.25mW + 60mW = 233.25mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
The equation for Tj is as follows: Tj =
θ
JA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
θ
JA must be used. Assuming a moderate
air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 85.5°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.233W * 85.5°C/W = 90°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 6. Thermal Resitance θJA for 48 Lead TQFP, Forced Convection
θ
JA vs. Air Flow
Linear Feet per Minute
0200
500
Single-Layer PCB, JEDEC Standard Test Boards
146.4°C/W
125.2°C/W
112.1°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
93.2°C/W
85.5°C/W
81.2°C/W
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