參數(shù)資料
型號(hào)： 79RC64574
廠商： Integrated Device Technology, Inc.
英文描述： Advanced 64-bit Microprocessors Product Family
中文描述： 先進(jìn)的64位微處理器產(chǎn)品系列
文件頁(yè)數(shù)： 7/28頁(yè)
文件大?。?/td> 399K
代理商： 79RC64574
7 of 28
December 14, 2001
79RC64574 79RC64575
Pin Description Table
The following is a list of system interface pins available on the RC64574/575. Pin names ending with an asterisk (*) are active when low.
Pin Name
Type
Description
System Interface
ExtRqst*
I
External request
An external agent asserts ExtRqst* to request use of the System interface. The processor grants the request
by asserting Release*.
Release*
O
Release interface
In response to the assertion of ExtRqst* or a CPU read request, the processor asserts Release* and signals
to the requesting device that the system interface is available.
RdRdy*
I
Read Ready
The external agent asserts RdRdy* to indicate that it can accept a processor read request.
WrRdy*
I
Write Ready
An external agent asserts WrRdy* when it can now accept a processor write request.
ValidIn*
I
Valid Input
Signals that an external agent is now driving a valid address or data on the SysAD bus and a valid command
or data identifier on the SysCmd bus.
ValidOut*
O
Valid Output
Signals that the processor is now driving a valid address or data on the SysAD bus and a valid command or
data identifier on the SysCmd bus.
SysAD(63:0)
I/O
System address/data bus
A 64-bit address and data bus for communication between the processor and an external agent. In 64 bit
interface mode, during address phases only, SysAd(35:0) contains invalid address information. The remain-
ing SysAD(63:36) pins are not used. The whole 64-bit SysAD(63:0) may be used during the data transfer
phase. For all double-word accesses (read or write), the low-order 3 bits (SysAD[2:0]) will always be output as
zero during the address phase.
In 32-bit interface mode and in the RC64574, SysAD(63:32) is not used, regardless of Endianness. A 32-bit
address and data communication between processor and external agent is performed via SysAD(31:0).
SysADC(7:0)
I/O
System address/data check bus
An 8-bit bus containing parity check bits for the SysAD bus during data bus cycles.
In 32-bit mode and in the RC64574, SysADC(7:4) is not used. The SysADC(3:0) contains check bits for
SysAD(31:0).
SysCmd(8:0)
I/O
System command/data identifier bus
A 9-bit bus for command and data identifier transmission between the processor and an external agent.
SysCmdP
I/O
System Command Parity
A single, even-parity bit for the Syscmd bus. This signal is always driven low.
Clock/Control Interface
SysClock
I
SystemClock
The system clock input establishes the processor and bus operating frequency. It is multiplied internally by
2,3,4,5,6,7, or 8 to generate the pipeline clock (PClock).
V
CC
P
I
Quiet VCC for PLL
Quiet V
CC
for the internal phase locked loop.
V
SS
P
I
Quiet V
SS
for PLL
Quiet V
SS
for the internal phase locked loop.
Table 5 Pin Descriptions (Page 1 of 2)
相關(guān)PDF資料
PDF描述
79RC64575 Advanced 64-bit Microprocessors Product Family
A-1001E SINGLE DIGIT DISPLAY
A-811H SINGLE DIGIT DISPLAY
A-811SR SINGLE DIGIT DISPLAY
A-811Y SINGLE DIGIT DISPLAY
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
79RC64575 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:Advanced 64-bit Microprocessors Product Family
79RC64T574-200DZ 制造商:Integrated Device Technology Inc 功能描述:MPU RC64574 RISC 64-Bit 200MHz 3.3V 128-Pin PQFP
79RC64T574-250DZ 制造商:Integrated Device Technology Inc 功能描述:MPU RC64574 RISC 64-Bit 250MHz 3.3V 128-Pin PQFP
79RC64T575-200DP 制造商:Integrated Device Technology Inc 功能描述:MPU RC64575 RISC 64-Bit 200MHz 3.3V 208-Pin PQFP
79RC64T575-250DP 制造商:Integrated Device Technology Inc 功能描述:MPU RC64575 RISC 64-Bit 250MHz 3.3V 208-Pin PQFP 制造商:IDT from Components Direct 功能描述:64BIT EMBEDDED MICROPROCESSOR RC64575 RISC 250MHZ - Trays 制造商:IDT 功能描述:IDT 79RC64T575-250DP, 64Bit Embedded Microprocessor RC64575 RISC 250MHz 3.3V 208-Pin PQFP
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