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December 14, 2001
2001 Integrated Device Technology, Inc.
DSC 5607
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
Advanced 64-bit
Microprocessors
Product Family
Features
◆
High-performance 64-bit embedded Microprocessor
–
250MHz operating frequency
–
>330 Dhrystone MIPS performance
–
300MFLOPS/s floating-point performance
–
Up to 125 million multiply accumulate per second (MAC/s)
–
MIPS-IV Instruction Set Architecture (ISA), with integer DSP
and 3-operand integer multiply extensions
–
Limited dual-issue microarchitecture
◆
Compatible with RC4640 and RC32364 DSP extensions
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DSP Extensions, for consumer applications
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2-cycle repeat rate, on atomic Multiply-add
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Multiply-subtract (MSUB) support, for complex number
processing
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Count-leading-zero/one support, for string searches and
normalization
◆
High-performance on-chip cache subsystem
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32kB, two-set associative instruction cache (I-cache)
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32kB, two-set associative data cache (D-cache)
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Write-through and write-back data cache operations
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High-performance cache-ops, bandwidth management
◆
I-cache and D-cache locking capability (per line), provides
improved real-time support
◆
Joint TLB on-chip, for virtual-to-physical address mapping
◆
Big- or Little-endian capability
◆
RC5000 compatible memory management
–
On-chip 48-entry, 96-page TLB, for advanced operating
system support
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Compatible with major operating systems:
Windows
CE, VxWorks, and others
◆
Bus compatible with IDT 64-bit microprocessor families
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Pipeline runs at 2 to 8 times the bus frequency
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Bus speeds to 125MHz
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32-bit bus option, for lower cost systems
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Enhanced timing protocol for SyncDRAM systems (compatible
with IDT79RC64474/475)
◆
RC64574:
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32-bit SysAd bus, for low-cost systems
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Pin compatible with RC4640 and RC64474
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128-pin QFP package
◆
RC64575:
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64-bit SysAd bus interface
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Pin compatible with RC4650 and RC64475
–
208-pin QFP package
◆
Industrial temperature range support
◆
JTAG Boundary Scan Interface
◆
2.5V operation with 3.3V tolerant I/O
Block Diagram
Figure 1 RC64574/RC64575 Block Diagram
64-bit
Integer
DSP
Accelerator
Execution Unit
666 MFIOPS
IEEE 1284
Floating-Point
Accelerator
PLL
Dual-Issue Instruction Fetch Unit
Primary Cache Controller
RC5000
Compatible
System Control
Coprocessor
48-entry
96-page
TLB
32kB
2 set-associative
Instruction
Cache
(Lockable)
32kB
2 set-associative
Data
Cache
(Lockable)
64-bit/32-bit
RC64474/475 Compatible
System Interface
ClkIn
79RC64574
79RC64575