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Rev.2.00
REJ03B0202-0200
Mar 05, 2007
Page 4 of 70
7549 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
PERFORMANCE OVERVIEW
Table 1
Performance overview
Parameter
Function
Number of basic instructions
Instruction execution time
Oscillation frequency
Memory sizes
71
0.25
μ
s (Minimum instruction, oscillation frequency 8MHz, double-speed mode)
8 MHz (Maximum)
2K bytes
×
8 bits
4K bytes
×
8 bits
6K bytes
×
8 bits
192 bytes
×
8 bits
256 bytes
×
8 bits
256 bytes
×
8 bits
1-bit
×
8, LED direct drive ports
1-bit
×
8
1-bit
×
1
1-bit
×
1
1-bit
×
2
13 sources, 13 vectors
8-bit
×
2, 16-bit
×
1
3-channel
1 channel
8-bit
×
1 (UART or clock synchronous)
10-bit resolution
×
8 channel
16-bit
×
1
Built-in
Built-in
Built-in (external ceramic resonator or quartz-crystal oscillator, external 32-kHz
quartz-crystal oscillator available) (built-in high/low-speed on-chip oscillator)
Function set ROM is assigned to address FFD8
16
to FFDA
16
.
Valid/invaid of low voltage detection circuit can be selected.
Oscillation mode can be selected.
Enable/disable of watchdog timer and STP instruction can be selected.
ROM code protect is assigned to address FFDB
16
.
Read/write the built-in QzROM by serial programmer is disabled by setting “00”
to ROM code protect.
4.5 to 5.5 V
2.4 to 5.5 V
2.2 to 5.5 V
4.0 to 5.5 V
2.4 to 5.5 V
1.8 to 5.5 V
4.0 to 5.5 V
ROM
M37549G1
M37549G2
M37549G3
M37549G1
M37549G2
M37549G3
RAM
I/O port
P0
0
-P0
7
I/O
P1
0
-P1
7
I/O
P2
0
P2
1
P3
0
, P3
1
I/O
Source
Output
I/O
Interrupt
Timer
Output compare
Input capture
Serial interface
A/D converter
Watchdog timer
Power-on reset circuit
Low voltage detection circuit
Clock generating circuit
Function set ROM
area
Function set ROM
ROM code protect
Power source
voltage
(at ceramic
resonator)
Double-
speed
mode
at 8 MHz oscillation
at 2 MHz oscillation
at 1 MHz oscillation
at 8 MHz oscillation
at 4 MHz oscillation
at 1 MHz oscillation
at 4 MHz oscillation
High-
speed
mode
Power source
voltage
(at high-speed on-
chip oscillator)
Power source
voltage
(at low-speed on-
chip oscillator)
Power dissipation
Operating temperature range
Device structure
Package
Double-
speed
mode
Double-
speed
mode
at 250 kHz oscillation
1.8 to 5.5 V
TBD
-20 to 85 °C
CMOS sillicon gate
24-pin plastic molded SSOP (PRSP0024GA-A)
42-pin shrink ceramic PIGGY BACK (42S1M)