參數(shù)資料
型號(hào)： 7531GROUP
英文描述： 250MA CMOS LDO, ISUPPLY 1UA & 2% VOUT ACCURACY, -40C to +125C, 3-SOT-89, T/R
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 16/64頁(yè)
文件大?。?/td> 633K
代理商： 7531GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7531 Group
MITSUBISHI MICROCOMPUTERS
16
Interrupts
Interrupts occur by 12 different sources : 4 external sources, 7 inter-
nal sources and 1 software source.
Interrupt control
All interrupts except the BRK instruction interrupt have an interrupt
request bit and an interrupt enable bit, and they are controlled by the
interrupt disable flag. When the interrupt enable bit and the interrupt
request bit are set to “1” and the interrupt disable flag is set to “0”, an
interrupt is accepted.
The interrupt request bit can be cleared by program but not be set.
The interrupt enable bit can be set and cleared by program.
It becomes usable by switching CNTR
0
and AD conversion interrupt
sources with bit 7 of the interrupt edge selection register, timer 2 and
serial I/O2 interrupt sources with bit 6, timer X and key-on wake-up
interrupt sources with bit 5, and serial I/O1 transmit and INT
1
inter-
rupt sources with bit 4.
The reset and BRK instruction interrupt can never be disabled with
any flag or bit. All interrupts except these are disabled when the in-
terrupt disable flag is set.
When several interrupts occur at the same time, the interrupts are
received according to priority.
Interrupt operation
Upon acceptance of an interrupt the following operations are auto-
matically performed:
1. The processing being executed is stopped.
2. The contents of the program counter and processor status regis-
ter are automatically pushed onto the stack.
3. The interrupt disable flag is set and the corresponding interrupt
request bit is cleared.
4. Concurrently with the push operation, the interrupt destination
address is read from the vector table into the program counter.
Notes on use
When the active edge of an external interrupt (INT
0
, INT
1
,CNTR
0
) is
set, the interrupt request bit may be set.
Therefore, please take following sequence:
1. Disable the external interrupt which is selected.
2. Change the active edge in interrupt edge selection register. (in
case of CNTR
0
: Timer X mode register)
3. Clear the set interrupt request bit to “0”.
4. Enable the external interrupt which is selected.
Table 6 Interrupt vector address and priority
Vector addresses (Note 1)
High-order
FFFD
16
FFFB
16
FFF9
16
FFF7
16
FFF5
16
FFF3
16
FFF1
16
FFEF
16
FFED
16
Priority
1
2
3
4
5
6
7
8
9
Low-order
FFFC
16
FFFA
16
FFF8
16
FFF6
16
FFF4
16
FFF2
16
FFF0
16
FFEE
16
FFEC
16
Interrupt request generating conditions
At reset input
At completion of serial I/O1 data receive
At completion of serial I/O1 transmit shift or
when transmit buffer is empty
At detection of either rising or falling edge
of INT
1
input
At detection of either rising or falling edge
of INT
0
input
At timer X underflow
At falling of conjunction of input logical
level for port P0 (at input)
At timer 1 underflow
At timer 2 underflow
At completion of transmit/receive shift
At detection of either rising or falling edge
of CNTR
0
input
At completion of A-D conversion
At BRK instruction execution
Remarks
Non-maskable
Valid when serial I/O1 is selected
Valid when serial I/O1 is selected
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt (valid at falling)
STP release timer underflow
External interrupt (active edge
selectable)
Non-maskable software interrupt
Interrupt source
Reset (Note 2)
Serial I/O1
receive
Serial I/O1
transmit
INT
1
(Note 3)
INT
0
Timer X
Key-on wake-up
Timer 1
Timer 2
Serial I/O2
CNTR
0
A-D conversion
BRK instruction
Note 1:
Vector addressed contain internal jump destination addresses.
2:
Reset function in the same way as an interrupt with the highest priority.
3:
It is an interrupt which can use only for 36 pin version.
相關(guān)PDF資料
PDF描述
7531 250mA CMOS LDO, Isupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R
7532 Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R
7533 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R
753252 250mA CMOS LDO, lsupply 1uA and 2% Vout Accuracy, -40C to +125C, 3-SOT-23, T/R
7535 Low Quiescent Current LDO, -40C to +125C, 3-SOT-23, T/R
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
7532 制造商:BM Connecting Cables 功能描述:T/STONE G KVLR GLVS 9
7532/7536 制造商:未知廠家 制造商全稱:未知廠家 功能描述:7532/7536 Group USER＇S MANUALHardware Manual & Device User＇s Manual 1715K/SEP.05.00
75320 功能描述:BIT MICRO HEX SYST4 2.0MM 28MM RoHS:否 類別:工具 >> 螺釘和螺母驅(qū)動(dòng)器 - 刀片和位 系列:系統(tǒng) 4 標(biāo)準(zhǔn)包裝:1 系列:TorqueVario™ 類型:十字槽刀片 尺寸:#2 長(zhǎng)度:7.48"（190mm） 特點(diǎn):絕緣達(dá) 10,000V 重量:0.07 磅（31.75g）
753201102GP 制造商:CTS Corporation 功能描述:RES NET 1K OHM 2% 17/25W 200PPM/ C BUS 20PIN DUAL ROW SMD - Bulk
753201102GPTR13 制造商:CTS Corporation 功能描述:RES NET 1K OHM 2% 17/25W 200PPM/ C BUS 20PIN DUAL ROW SMD - Tape and Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*