參數(shù)資料
型號(hào)： 74VCXH16373DTRG
廠商： ON SEMICONDUCTOR
元件分類： 通用總線功能
英文描述： Low−Voltage 1.8/2.5/3.3 V 16−Bit Transparent Latch
中文描述： ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝： LEAD FREE, TSSOP-48
文件頁數(shù)： 1/11頁
文件大?。?/td> 254K
代理商： 74VCXH16373DTRG
Semiconductor Components Industries, LLC, 2006
June, 2006
Rev. 6
1
Publication Order Number:
74VCXH16373/D
74VCXH16373
LowVoltage 1.8/2.5/3.3 V
16Bit Transparent Latch
With 3.6 V
Tolerant Inputs and Outputs
(3
State, Non
Inverting)
The 74VCXH16373 is an advanced performance, non
inverting
16
bit transparent latch. It is designed for very high
speed, very
low
power operation in 1.8 V, 2.5 V or 3.3 V systems. The
VCXH16373 is byte controlled, with each byte functioning
identically, but independently. Each byte has separate Output Enable
and Latch Enable inputs. These control pins can be tied together for
full 16
bit operation.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.
The 74VCXH16373 contains 16 D
type latches with 3
state
3.6 V
tolerant outputs. When the Latch Enable (LEn) inputs are
HIGH, data on the Dn inputs enters the latches. In this condition, the
latches are transparent, (a latch output will change state each time its D
input changes). When LE is LOW, the latch stores the information that
was present on the D inputs a setup time preceding the
HIGH
to
LOW transition of LE. The 3
state outputs are controlled
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are
enabled. When OE is HIGH, the standard outputs are in the high
impedance state, but this does not interfere with new data entering into
the latches. The data inputs include active bushold circuitry,
eliminating the need for external pullup resistors to hold unused or
floating inputs at a valid logic state.
Features
Designed for Low Voltage Operation: V
CC
= 1.65 V
3.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation: 3.0 ns max for 3.0 V to 3.6 V
3.9 ns max for 2.3 V to 2.7 V
6.8 ns max for 1.65 V to 1.95 V
Static Drive:
±
24 mA Drive at 3.0 V
±
18 mA Drive at 2.3 V
±
6 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
Includes Active Bushold to Hold Unused or Floating Inputs at
a Valid Logic State
I
OFF
Specification Guarantees High Impedance When V
CC
= 0 V*
Near Zero Static Supply Current in All Three Logic States (20 A)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±
250 mA @ 125
°
C
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
Pb
Free Package is Available**
*To ensure the outputs activate in the 3
state condition,
the output enable pins should be connected to V
CC
through a
pull
up resistor. The value of the resistor is determined by the
current sinking capability of the output connected to the OE pin.
PIN NAMES
Function
Output Enable Inputs
Latch Enable Inputs
Inputs
Outputs
Pins
OEn
LEn
D0
D15
O0
O15
http://onsemi.com
MARKING DIAGRAM
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
TSSOP
48
DT SUFFIX
CASE 1201
1
48
VCXH16373
AWLYYWW
1
48
Device
Package
Shipping
ORDERING INFORMATION
74VCXH16373DT
TSSOP
39 / Rail
74VCXH16373DTR
TSSOP
2500/Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
74VCXH16373DTRG TSSOP
(Pb
Free)
2500/Tape & Reel
**For additional information on our Pb
Free strategy
and soldering details, please download the
ON Semiconductor
Soldering
Techniques Reference Manual, SOLDERRM/D.
and
Mounting
相關(guān)PDF資料
PDF描述
74VCXH16373 Low-Voltage 1.8/2.5/3.3V 16-Bit Transparent Latch With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位透明鎖存器(3態(tài),同相))
74VCXH245MNR2 Low-Voltage 1.8/2.5/3.3 V 8-Bit Transceiver
74VCXH245MNR2G Low-Voltage 1.8/2.5/3.3 V 8-Bit Transceiver
74VCXR162245 Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver With 26Ω Series Resistors on A and B Outputs and 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(帶26Ω串聯(lián)電阻器,3.6V容限輸入和輸出的低壓1.8/2.5/3.3V,16位緩沖器(3態(tài),同相))
74VHC4046 CMOS Phase Lock Loop
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74VCXH16373G 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 16-Bit Transparent Latch with Bushold
74VCXH16373GX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch
74VCXH16373MTD 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74VCXH16373MTD_Q 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74VCXH16373MTDX 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
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