參數(shù)資料
型號(hào): 74VCX16245DTRG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Low - Voltage 1.8 / 2.5 / 3.3V 16-Bit Transceiver With 3.6 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
中文描述: ALVC/VCX/A SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48
封裝: LEAD FREE, TSSOP-48
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 95K
代理商: 74VCX16245DTRG
74VCX16245
http://onsemi.com
5
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25
°
C
Symbol
Characteristic
Condition
Typ
Unit
V
OLP
Dynamic LOW Peak Voltage
V
CC
= 1.8V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.25
V
(Note 6.)
V
CC
= 2.5V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.6
V
CC
= 3.3V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.8
V
OLV
Dynamic LOW Valley Voltage
V
CC
= 1.8V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.25
V
(Note 6.)
V
CC
= 2.5V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.6
V
CC
= 3.3V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
0.8
V
OHV
Dynamic HIGH Valley Voltage
V
CC
= 1.8V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
1.5
V
(Note 7.)
V
CC
= 2.5V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
1.9
V
CC
= 3.3V, C
L
= 30pF, V
IH
= V
CC
, V
IL
= 0V
2.2
6. Number of outputs defined as “n”. Measured with “n1” outputs switching from HIGHtoLOW or LOWtoHIGH. The remaining output is
measured in the LOW state.
7. Number of outputs defined as “n”. Measured with “n1” outputs switching from HIGHtoLOW or LOWtoHIGH. The remaining output is
measured in the HIGH state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
C
IN
Input Capacitance
Note 8.
6
pF
C
OUT
Output Capacitance
Note 8.
7
pF
C
PD
Power Dissipation Capacitance
Note 8., 10MHz
20
pF
8. V
CC
= 1.8, 2.5 or 3.3V; V
I
= 0V or V
CC
.
AC CHARACTERISTICS
(t
R
= t
F
= 2.0ns; C
L
= 50pF; R
L
= 500 )
Limits
T
A
= 40
°
C to +85
°
C
V
CC
= 3.0V to 3.6V
V
CC
= 2.7V
Symbol
Parameter
Waveform
Min
Max
Min
Max
Unit
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
t
OSLH
Propagation Delay
Input to Output
3
1.0
1.0
3.0
3.0
3.6
3.6
ns
Output Enable Time to
High and Low Level
4
1.0
1.0
4.4
4.4
5.4
5.4
ns
Output Disable Time From
High and Low Level
4
1.0
1.0
4.1
4.1
4.6
4.6
ns
OutputtoOutput Skew
(Note 9.)
0.5
0.5
0.5
0.5
ns
9. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGHtoLOW (t
OSHL
) or LOWtoHIGH (t
OSLH
); parameter
guaranteed by design.
相關(guān)PDF資料
PDF描述
74VCX16245 Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver With 3.6 V-Tolerant Inputs and Outputs (3-State,Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位收發(fā)器(3態(tài),同相))
74VCX16373 Low-Voltage 1.8/2.5/3.3V 16-Bit Transparent Latch With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位透明鎖存器(3態(tài),同相))
74VCX16374 Low-Voltage 1.8/2.5/3.3V 16-Bit D-Type Flip-Flop With 3.6 V-Tolerant Inputs and Outputs (3-State,Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位D觸發(fā)器(3態(tài),同相))
74VCXH16240 Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),反相))
74VCXH16244 Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),同相))
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