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參數(shù)資料
| 型號： | 74VCX16373 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Low-Voltage 1.8/2.5/3.3V 16-Bit Transparent Latch With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位透明鎖存器(3態(tài),同相)) |
| 中文描述： | 低電壓1.8/2.5/3.3V 16位透明鎖存器與3.6 V的電壓容限輸入和輸出（三態(tài)，非反相）（低壓1.8/2.5/3.3V，3.6V的容限輸入和輸出，16位透明鎖存器（三態(tài)，同相）） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 145K |
| 代理商： | 74VCX16373 |
Semiconductor Components Industries, LLC, 2001
January, 2001 – Rev. 1
1
Publication Order Number:
74VCX16373/D
74VCX16373
Low-Voltage 1.8/2.5/3.3V
16-Bit Transparent Latch
With 3.6V–Tolerant Inputs and Outputs
(3–State, Non–Inverting)
The 74VCX16373 is an advanced performance, non–inverting
16–bit transparent latch. It is designed for very high–speed, very
low–power operation in 1.8V, 2.5V or 3.3V systems. The VCX16373
is byte controlled, with each byte functioning identically, but
independently. Each byte has separate Output Enable and Latch
Enable inputs. These control pins can be tied together for full 16–bit
operation.
When operating at 2.5V (or 1.8V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3V busses. It is guaranteed to be over–voltage tolerant to 3.6V.
The 74VCX16373 contains 16 D–type latches with 3–state
3.6V–tolerant outputs. When the Latch Enable (LEn) inputs are
HIGH, data on the Dn inputs enters the latches. In this condition, the
latches are transparent, (a latch output will change state each time its D
input changes). When LE is LOW, the latch stores the information that
was present on the D inputs a setup time preceding the
HIGH–to–LOW transition of LE. The 3–state outputs are controlled
by the Output Enable (OEn) inputs. When OE is LOW, the outputs are
enabled. When OE is HIGH, the standard outputs are in the high
impedance state, but this does not interfere with new data entering into
the latches.
Designed for Low Voltage Operation: V
CC
= 1.65–3.6V
3.6V Tolerant Inputs and Outputs
High Speed Operation:
3.0ns max for 3.0 to 3.6V
3.9ns max for 2.3 to 2.7V
6.8ns max for 1.65 to 1.95V
Static Drive:
±
24mA Drive at 3.0V
±
18mA Drive at 2.3V
±
6mA Drive at 1.65V
Supports Live Insertion and Withdrawal
I
OFF
Specification Guarantees High Impedance When V
CC
= 0V
Near Zero Static Supply Current in All Three Logic States (20
μ
A)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±
250mA @ 125
°
C
ESD Performance: Human Body Model >2000V; Machine Model
>200V
http://onsemi.com
MARKING DIAGRAM
A
WL = Wafer Lot
YY
= Year
WW = Work Week
= Assembly Location
TSSOP–48
DT SUFFIX
CASE 1201
1
48
74VCX16373DT
AWLYYWW
1
48
Device
Package
Shipping
ORDERING INFORMATION
74VCX16373DT
TSSOP
39 / Rail
74VCX16373DTR
TSSOP
2500 / Reel
PIN NAMES
Function
Output Enable Inputs
Latch Enable Inputs
Inputs
Outputs
Pins
OEn
LEn
D0–D15
O0–O15
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74VCX16374 | Low-Voltage 1.8/2.5/3.3V 16-Bit D-Type Flip-Flop With 3.6 V-Tolerant Inputs and Outputs (3-State,Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位D觸發(fā)器(3態(tài),同相)) |
| 74VCXH16240 | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),反相)) |
| 74VCXH16244 | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer With 3.6 V-Tolerant Inputs and Outputs (3-State, Non-Inverting)(低壓1.8/2.5/3.3V,3.6V容限輸入和輸出,16位緩沖器(3態(tài),同相)) |
| 74VCXH16245 | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
| 74VCXH16245DT | Low-Voltage 1.8/2.5/3.3V 16-Bit Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74VCX16373/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3V 16-Bit Transparent Latch |
| 74VCX16373_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Low−Voltage 1.8/2.5/3.3V 16−Bit Transparent Latch |
| 74VCX16373DT | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:ON Semiconductor 功能描述: |
| 74VCX16373DTR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| 74VCX16373GX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
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