參數(shù)資料
型號(hào): 74LVC2G17GV
英文描述: Dual non-inverting Schmitt-trigger with 5 V tolerant input
中文描述: 具有5伏容錯(cuò)輸入的雙非反相施密特觸發(fā)器
文件頁數(shù): 8/18頁
文件大?。?/td> 103K
代理商: 74LVC2G17GV
2005 Feb 02
8
Philips Semiconductors
Product specification
Dual buffer/line driver with 5 V
tolerant inputs/outputs; 3-state
74LVC2G241
AC CHARACTERISTICS
GND = 0 V.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
WAVEFORMS
V
CC
(V)
T
amb
=
40
°
C to +85
°
C;
note 1
t
PHL
/t
PLH
propagation delay nA to nY
see Figs 4 and 7
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
4.5 to 5.5
1.0
0.5
1.0
0.5
0.5
1.5
1.0
1.5
0.5
0.5
1.0
0.5
1.0
1.0
0.5
1.0
1.0
1.0
1.0
0.5
1.0
0.5
1.5
1.0
0.5
4.5
2.8
2.8
2.6
2.1
5.2
3.1
3.2
2.7
2.0
3.2
2.2
2.8
2.6
2.0
4.3
2.7
2.7
2.5
1.9
3.6
2.0
3.2
2.8
2.0
8.8
4.9
4.7
4.3
3.7
9.9
5.6
5.5
4.7
3.8
11.6
5.8
4.6
4.4
3.4
8.8
4.7
4.6
4.1
3.3
12.5
5.2
4.9
4.2
3.3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
PZH
/t
PZL
3-state output enable time
1OE to 1Y
see Figs 5 and 7
t
PHZ
/t
PLZ
3-state output disable time
1OE to 1Y
see Figs 5 and 7
t
PZH
/t
PZL
3-state output enable time
2OE to 2Y
see Figs 6 and 7
t
PHZ
/t
PLZ
3-state output disable time
2OE to 2Y
see Figs 6 and 7
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