參數(shù)資料
型號: 74HC4510N
廠商: NXP SEMICONDUCTORS
元件分類: 計(jì)數(shù)器
英文描述: BCD up/down counter
中文描述: HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, PDIP16
文件頁數(shù): 4/12頁
文件大小: 102K
代理商: 74HC4510N
December 1990
12
Philips Semiconductors
Product specication
BCD up/down counter
74HC/HCT4510
Fig.14 State diagram.
Count-up mode: illegal states in
BCD counters corrected in one count.
Count-down mode: illegal states in
BCD counters corrected in one or
two counts.
Count-up mode.
Count-down mode.
Fig.15 Programmable cascaded frequency divider.
Use the following formulae to calculate Ntotal:
Formulae are only applicable if legal data is
provided to the parallel inputs.
N
total
i
π
1
10
N
i
×
()
N
0
+
=
f
out
f
in
N
total
--------------
=
Note
1. no count; fout is HIGH.
parallel inputs
count-up
n
count-down
n
D3
D2
D1
D0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
9
8
7
6
5
4
3
2
1
(1)
1
2
3
4
5
6
7
8
9
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
相關(guān)PDF資料
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