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參數(shù)資料
| 型號： | 74HC195 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 4-bit parallel access shift register |
| 中文描述： | 4位并行存取移位寄存器 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 67K |
| 代理商： | 74HC195 |
December 1990
7
Philips Semiconductors
Product specification
4-bit parallel access shift register
74HC/HCT195
DC CHARACTERISTICS FOR HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
I
CC
category: MSI
Note to HCT types
The value of additional quiescent supply current (
I
CC
) for a unit load of 1 is given in the family specifications.
To determine
I
CC
per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
INPUT
UNIT LOAD COEFFICIENT
PE
all others
0.65
0.35
SYMBOL PARAMETER
T
amb
(
°
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+
25
40 to
+
85
40 to
+
125
min.
typ.
max.
min. max. min.
max.
t
PHL
/ t
PLH
propagation delay
CP to Q
n
propagation delay
MR to Q
n
output transition time
18
32
40
48
ns
4.5
Fig.6
t
PHL
17
35
44
53
ns
4.5
Fig.8
t
THL
/ t
TLH
7
15
19
22
ns
4.5
Fig.6
t
W
clock pulse width
HIGH or LOW
master reset pulse width
LOW
removal time
MR to CP
set-up time
J, K, PE to CP
set-up time
D
n
to CP
hold time
J, K, PE, D
n
to CP
maximum clock pulse
frequency
20
6
25
30
ns
4.5
Fig.6
t
W
16
6
20
24
ns
4.5
Fig.8
t
rem
16
6
20
24
ns
4.5
Fig.8
t
su
20
12
25
30
ns
4.5
Figs 8 and 9
t
su
16
6
20
24
ns
4.5
Figs 8 and 9
t
h
3
5
3
3
ns
4.5
Figs 8 and 9
f
max
27
52
22
18
MHz
4.5
Fig.6
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| 74HC1958 | 制造商:PHI 功能描述:74HC195D PHIL'88 |
| 74HC195J | 制造商:Motorola Inc 功能描述: |
| 74HC195N | 制造商:NXP Semiconductors 功能描述: |
| 74HC1G00 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-input NAND gate |
| 74HC1G00GV | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-input NAND gate |
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